Wire ordering for detailed routing. - Patrick Groeneveld (IEEE Des. Test, 1989)

A multiple layer contour-based gridless channel router. - Patrick Groeneveld (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990)

Necessary and sufficient conditions for the routability of classical channels. - Patrick Groeneveld (Integr., 1993)

Timing closure: the solution and its problems. - Raul Camposano; Olivier Coudert; Patrick Groeneveld; Leon Stok; Ralph H. J. M. Otten (ASP-DAC, 2000)

Design closure (panel session): hope or hype? - Raul Camposano; Jacob Greidinger; Patrick Groeneveld; Michael Jackson 004; Lawrence T. Pileggi; Louis Scheffer (DAC, 2000)

The right floorplanning formulations for future chip implementation methodologies (panel discussion - title only). - Patrick Groeneveld; Jacob Greidinger; J. George Janac; Wilm E. Donath (ISPD, 2000)

Automatic Hierarchical Design: Fantasy or Reality? (Panel). - Rob A. Rutenbar; Olivier Coudert; Patrick Groeneveld; Jürgen Koehl; Scott Peterson; Vivek Raghavan; Naresh Soni (ICCAD, 2001)

Tools or users: which is the bigger bottleneck? - Andrew B. Kahng; Ronald Collett; Patrick Groeneveld; Lavi Lev; Nancy Nettleton; Paul K. Rodman; Lambert van den Hoven (DAC, 2002)

Design Automation for Deepsubmicron: Present and Future. - Ralph H. J. M. Otten; Raul Camposano; Patrick Groeneveld (DATE, 2002)

Physical Design Challenges for Billion Transistor Chips. - Patrick Groeneveld (ICCD, 2002)

Nanometer design: place your bets. - Andrew B. Kahng; Shekhar Borkar; John M. Cohn; Antun Domic; Patrick Groeneveld; Louis Scheffer; Jean-Pierre Schoellkopf (DAC, 2003)

How Can System-Level Design Solve the Interconnect Technology Scaling Problem? - Francky Catthoor; Andrea Cuomo; Grant Martin; Patrick Groeneveld; Rudy Lauwereins; Karen Maex; Patrick van de Steeg; Ron Wilson (DATE, 2004)

Probabilistic congestion prediction. - Jurjen Westra; Chris Bartels; Patrick Groeneveld (ISPD, 2004)

Physical Synthesis: its struggle with Moore's law. - Patrick Groeneveld (MBMV, 2004)

Post-Placement Pin Optimiztion. - Jurjen Westra; Patrick Groeneveld (ISVLSI, 2005)

Towards Integration of Quadratic Placement and Pin Assignment. - Jurjen Westra; Patrick Groeneveld (ISVLSI, 2005)

Is probabilistic congestion estimation worthwhile? - Jurjen Westra; Patrick Groeneveld (SLIP, 2005)

Comparison of An Æthereal Network on Chip and A Traditional Interconnect for A Multi-Processor DVB-T System on Chip. - Chris Bartels; Jos Huisken; Kees Goossens; Patrick Groeneveld; Jef L. van Meerbergen (VLSI-SoC, 2006)

Comparison of an Æthereal Network on Chip and Traditional Interconnects - Two Case Studies. - Arno Moonen; Chris Bartels; Marco Bekooij; René van den Berg; Harpreet Bhullar; Kees Goossens; Patrick Groeneveld; Jos Huisken; Jef L. van Meerbergen (VLSI-SoC (Selected Papers), 2006)

Oil fields, hedge funds, and drugs. - Patrick Groeneveld; Rob A. Rutenbar; Jed W. Pitera; Erik C. Carlson; Jinsong Chen (DAC, 2009)

Going with the flow: bridging the gap between theory and practice in physical design. - Patrick Groeneveld (ISPD, 2010)

SLIP: 10 years ago and 10 years from now. - Patrick Groeneveld; Louis Scheffer; Dirk Stroobandt (SLIP, 2010)

Reality-driven physical synthesis. - Patrick Groeneveld (ISPD, 2012)

Optimizing for Power, Speed, Cost and Emissions in Automotive Drivetrains. - Patrick R. Groeneveld (ISPD, 2016)

Trailblazing Physical Design Flows: Ralph Otten's Impact on Design Automation. - Patrick R. Groeneveld (ISPD, 2016)

Session details: Cyber-Physical Systems. - Patrick Groeneveld (ISPD, 2019)

ISPD 2020 Physical Mapping of Neural Networks on a Wafer-Scale Deep Learning Accelerator. - Michael James 002; Marvin Tom; Patrick Groeneveld; Vladimir Kibardin (ISPD, 2020)

Wafer scale interconnect and pathfinding for machine learning hardware (invited). - Patrick Groeneveld (SLIP, 2020)

ISPD 2021 Wafer-Scale Physics Modeling Contest: A New Frontier for Partitioning, Placement and Routing. - Patrick Groeneveld; Michael James 002; Vladimir Kibardin; Ilya Sharapov; Marvin Tom; Leo Wang (ISPD, 2021)

From Hard-Coded Heuristics to ML-Driven Optimization: New Frontiers for EDA. - Patrick R. Groeneveld (ISPD, 2022)