TAC-RAM: A 65nm 4Kb SRAM Computing-in-Memory Design with 57.55 TOPS/W supporting Multibit Matrix-Vector Multiplication for Binarized Neural Network. - Xiaomeng Wang; Xuejiao Liu; Xianghong Hu; Xiaopeng Zhong; Xizi Chen; Yu Liu 007; Patrick Kong; Fengshi Tian; Chi-Ying Tsui (AICAS, 2022)