Silicon Reliability Characterization of Intel's Foveros 3D Integration Technology for Logic-on-Logic Die Stacking. - Chetan Prasad; Sunny Chugh; Hannes Greve; I-chen Ho; Enamul Kabir; Cheyun Lin; Mahjabin Maksud; Steven R. Novak; Benjamin Orr; Keun Woo Park; Anthony Schmitz; Zhizheng Zhang 006; et al. (IRPS, 2020)

8.1 Lakefield and Mobility Compute: A 3D Stacked 10nm and 22FFL Hybrid Processor System in 12×12mm2, 1mm Package-on-Package. - Wilfred Gomes; Sanjeev Khushu; Doug B. Ingerly; Patrick N. Stover; Nasirul I. Chowdhury; Frank O'Mahony; Ajay Balankutty; Noam Dolev; Martin G. Dixon; Lei Jiang; Surya Prekke; Biswajit Patra; et al. (ISSCC, 2020)

Ponte Vecchio: A Multi-Tile 3D Stacked Processor for Exascale Computing. - Wilfred Gomes; Altug Koker; Patrick N. Stover; Doug B. Ingerly; Scott Siers; Srikrishnan Venkataraman; Chris Pelto; Tejas Shah; Amreesh Rao; Frank O'Mahony; Eric Karl; Lance Cheney; et al. (ISSCC, 2022)