DVINO: A RISC-V Vector Processor Implemented in 65nm Technology. - Guillem Cabo; Gerard Candón; Xavier Carril; Max Doblas; Marc Domínguez; Alberto González 004; César Hernández; Víctor Jiménez; Vatistas Kostalampros; Rubén Langarita; Neiel Leyva; Guillem López-Paradís; et al. (DCIS, 2022)

Two examples of approximate arithmetic to reduce hardware complexity and power consumption. - Jordi Fornt; Leixin Jin; Imanol Etxezarreta; Pau Fontova; Josep Altet; Antonio Calomarde; Enric Morancho; Francesc Moll; Antonio Rubio 001 (DCIS, 2022)

Sargantana: A 1 GHz+ In-Order RISC-V Processor with SIMD Vector Extensions in 22nm FD-SOI. - Víctor Soria Pardos; Max Doblas; Guillem López-Paradís; Gerard Candón; Narcís Rodas; Xavier Carril; Pau Fontova-Musté; Neiel Leyva; Santiago Marco-Sola; Miquel Moretó (DSD, 2022)

Sargantana: An Academic SoC RISC-V Processor in 22nm FDSOI Technology. - Max Doblas; Gerard Candón; Xavier Carril; Marc Domínguez; Enric Erra; Alberto González 004; César Hernández; Víctor Jiménez; Vatistas Kostalampros; Rubén Langarita; Neiel Leyva; Guillem López-Paradís; et al. (DCIS, 2023)

GMX: Instruction Set Extensions for Fast, Scalable, and Efficient Genome Sequence Alignment. - Max Doblas; Oscar Lostes-Cazorla; Quim Aguado-Puig; Nick Cebry; Pau Fontova-Musté; Christopher Frances Batten; Santiago Marco-Sola; Miquel Moretó (MICRO, 2023)

An automotive case study on the limits of approximation for object detection. - Martí Caro; Hamid Tabani; Jaume Abella 001; Francesc Moll; Enric Morancho; Ramon Canal; Josep Altet; Antonio Calomarde; Francisco J. Cazorla; Antonio Rubio 001; Pau Fontova; Jordi Fornt (J. Syst. Archit., 2023)

An Energy-Efficient GeMM-Based Convolution Accelerator With On-the-Fly im2col. - Jordi Fornt; Pau Fontova-Musté; Martí Caro; Jaume Abella 001; Francesc Moll; Josep Altet; Christoph Studer (IEEE Trans. Very Large Scale Integr. Syst., 2023)

Mix-GEMM: Extending RISC-V CPUs for Energy-Efficient Mixed-Precision DNN Inference Using Binary Segmentation. - Jordi Fornt; Enrico Reggiani; Pau Fontova-Musté; Narcís Rodas; Alessandro Pappalardo; Osman Sabri Unsal; Adrián Cristal Kestelman; Josep Altet; Francesc Moll; Jaume Abella 001 (IEEE Trans. Computers, 2025)