Energy-delay minimization in nanoscale domino logic. - Bo Fu 002; Qiaoyan Yu; Paul Ampadu (ACM Great Lakes Symposium on VLSI, 2006)

Leakage Power Minimization of Nanoscale CMOS Circuits via Non-Critical Path Transistor Sizing. - Bo Fu 002; Paul Ampadu (ICECS, 2006)

Cell Ratio Bounds for Reliable SRAM Operation. - Qiaoyan Yu; Paul Ampadu (ICECS, 2006)

Ultra-low voltage VLSI: are we there yet? - Paul Ampadu (ISCAS, 2006)

Techniques for robust energy efficient subthreshold domino CMOS circuits. - Bo Fu 002; Paul Ampadu (ISCAS, 2006)

Comparative Analysis of Ultra-Low Voltage Flip-Flops for Energy Efficiency. - Bo Fu 002; Paul Ampadu (ISCAS, 2007)

Temperature-Robust Performance Yield through Supply Voltage Selection. - David Wolpert 001; Paul Ampadu (ISCAS, 2007)

A ballistic nanoelectronic device simulator. - Dennis Huo; Qiaoyan Yu; Paul Ampadu (NANOARCH, 2007)

A Low-Power Safety Mode for Variation Tolerant Systems-on-Chip. - David Wolpert 001; Paul Ampadu (DFT, 2008)

Adaptive Error Control for NoC Switch-to-Switch Links in a Variable Noise Environment. - Qiaoyan Yu; Paul Ampadu (DFT, 2008)

Adaptive error control for reliable systems-on-chip. - Qiaoyan Yu; Paul Ampadu (ISCAS, 2008)

A Dual-Mode Hybrid ARQ Scheme for Energy Efficient On-Chip Interconnects. - Bo Fu 002; Paul Ampadu (NanoNet, 2008)

Normal and Reverse Temperature Dependence in Variation-Tolerant Nanoscale Systems with High-k Dielectrics and Metal Gates. - David Wolpert 001; Paul Ampadu (NanoNet, 2008)

A multi-wire error correction scheme for reliable and energy efficient SOC links using hamming product codes. - Bo Fu 002; Paul Ampadu (SoCC, 2008)

Configurable error correction for multi-wire errors in switch-to-switch SOC links. - Qiaoyan Yu; Paul Ampadu (SoCC, 2008)

Adaptive Delay Correction for Runtime Variation in Dynamic voltage Scaling Systems. - David Wolpert 001; Paul Ampadu (J. Circuits Syst. Comput., 2008)

An Energy-Efficient Multiwire Error Control Scheme for Reliable On-Chip Interconnects Using Hamming Product Codes. - Bo Fu 002; Paul Ampadu (VLSI Design, 2008)

Burst Error Detection Hybrid ARQ with Crosstalk-Delay Reduction for Reliable On-chip Interconnects. - Bo Fu 002; Paul Ampadu (DFT, 2009)

A Sensor to Detect Normal or Reverse Temperature Dependence in Nanoscale CMOS Circuits. - David Wolpert 001; Paul Ampadu (DFT, 2009)

Dual-Layer Cooperative Error Control for Reliable Nanoscale Networks-on-Chip. - Qiaoyan Yu; Paul Ampadu (DFT, 2009)

Ballistic Deflection Transistors and the Emerging Nanoscale Era. - David Wolpert 001; Hiroshi Irie; Roman Sobolewski; Paul Ampadu; Quentin Diduck; Martin Margala (ISCAS, 2009)

Lookahead-based adaptive voltage scheme for energy-efficient on-chip interconnect links. - Bo Fu 002; David Wolpert 001; Paul Ampadu (NOCS, 2009)

Adaptive error control for nanometer scale network-on-chip links. - Qiaoyan Yu; Paul Ampadu (IET Comput. Digit. Tech., 2009)

A simulator for ballistic nanostructures in a 2-D electron gas. - Dennis Huo; Qiaoyan Yu; David Wolpert 001; Paul Ampadu (ACM J. Emerg. Technol. Comput. Syst., 2009)

On Hamming Product Codes With Type-II Hybrid ARQ for On-Chip Interconnects. - Bo Fu 002; Paul Ampadu (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

An Area Efficient FFT/IFFT Processor for MIMO-OFDM WLAN 802.11n. - Bo Fu 002; Paul Ampadu (J. Signal Process. Syst., 2009)

Error control integration scheme for reliable NoC. - Qiaoyan Yu; Bo Zhang; Yan Li; Paul Ampadu (ISCAS, 2010)

Temperature-Aware Delay Borrowing for Energy-Efficient Low-Voltage Link Design. - David Wolpert 001; Bo Fu 002; Paul Ampadu (NOCS, 2010)

Transient and Permanent Error Co-management Method for Reliable Networks-on-Chip. - Qiaoyan Yu; Paul Ampadu (NOCS, 2010)

Error control combining Hamming and product codes for energy efficient nanoscale on-chip interconnects. - Bo Fu 002; Paul Ampadu (IET Comput. Digit. Tech., 2010)

A Flexible Parallel Simulator for Networks-on-Chip With Error Control. - Qiaoyan Yu; Paul Ampadu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

Exploiting Parity Computation Latency for On-Chip Crosstalk Reduction. - Bo Fu 002; Paul Ampadu (IEEE Trans. Circuits Syst. II Express Briefs, 2010)

Self-Adaptive System for Addressing Permanent Errors in On-Chip Interconnects. - Teijo Lehtonen; David Wolpert 001; Pasi Liljeberg; Juha Plosila; Paul Ampadu (IEEE Trans. Very Large Scale Integr. Syst., 2010)

Adaptive Voltage Control for Energy-Efficient NoC Links. - Paul Ampadu; Bo Fu 002; David Wolpert 001; Qiaoyan Yu (Low Power Networks-on-Chip, 2011)

Exploiting inherent information redundancy to manage transient errors in NoC routing arbitration. - Qiaoyan Yu; Meilin Zhang; Paul Ampadu (NOCS, 2011)

A comprehensive Networks-on-Chip simulator for error control explorations. - Qiaoyan Yu; Meilin Zhang; Paul Ampadu (NOCS, 2011)

A Sensor System to Detect Positive and Negative Current-Temperature Dependences. - David Wolpert 001; Paul Ampadu (IEEE Trans. Circuits Syst. II Express Briefs, 2011)

A Dual-Layer Method for Transient and Permanent Error Co-Management in NoC Links. - Qiaoyan Yu; Paul Ampadu (IEEE Trans. Circuits Syst. II Express Briefs, 2011)

Hybrid OTDM and WDM for multicore optical communication. - Abdelsalam A. Aboketaf; Liang Cao; Donald Adams; Ali W. Elshaari; Stefan F. Preble; Mark T. Crowley; Luke F. Lester; Paul Ampadu (IGCC, 2012)

Transient error management for partially adaptive router in network-on-chip (NoC). - Qiaoyan Yu; Paul Ampadu (ISCAS, 2012)

Fine-grained splitting methods to address permanent errors in Network-on-Chip links. - Meilin Zhang; Qiaoyan Yu; Paul Ampadu (ISCAS, 2012)

Transient and Permanent Error Control for High-End Multiprocessor Systems-on-Chip. - Qiaoyan Yu; José Cano 001; José Flich; Paul Ampadu (NOCS, 2012)

Exploiting Programmable Temperature Compensation Devices to Manage Temperature-Induced Delay Uncertainty. - David Wolpert 001; Paul Ampadu (IEEE Trans. Circuits Syst. I Regul. Pap., 2012)

Reliable Ultra-Low-Voltage Cache Design for Many-Core Systems. - Meilin Zhang; Vladimir Stojanovic; Paul Ampadu (IEEE Trans. Circuits Syst. II Express Briefs, 2012)

Dual-Layer Adaptive Error Control for Network-on-Chip Links. - Qiaoyan Yu; Paul Ampadu (IEEE Trans. Very Large Scale Integr. Syst., 2012)

Breaking the energy barrier in fault-tolerant caches for multicore systems. - Paul Ampadu; Meilin Zhang; Vladimir Stojanovic (DATE, 2013)

Variation-tolerant cache by two-layer error control codes. - Meilin Zhang; Paul Ampadu (DFTS, 2013)

Reliable ultra-low voltage cache with variation-tolerance. - Cheng Li 011; Meilin Zhang; Paul Ampadu (MWSCAS, 2013)

Addressing network-on-chip router transient errors with inherent information redundancy. - Qiaoyan Yu; Meilin Zhang; Paul Ampadu (ACM Trans. Embed. Comput. Syst., 2013)

A compact low-power eDRAM-based NoC buffer. - Cheng Li 011; Paul Ampadu (ISLPED, 2015)

Energy-efficient NoC with variable channel width. - Cheng Li 011; Paul Ampadu (MWSCAS, 2015)

Energy-efficient power trimming for reliable nanophotonic NoC microring resonators. - Mo Yang; Paul Ampadu (ISCAS, 2016)

Thermal-Aware Adaptive Fault-Tolerant Routing for Hybrid Photonic-Electronic NoC. - Mo Yang; Paul Ampadu (NoCArc@MICRO, 2016)

Improving Scalability in Thermally Resilient Hybrid Photonic-Electronic NoCs. - Keyvan Ramezanpour; Xingye Liu; Paul Ampadu (NoCArc@MICRO, 2017)

Reconfigurable Clock Generator with Wide Frequency Range and Single-Cycle Phase and Frequency Switching. - Keyvan Ramezanpour; Paul Ampadu (SoCC, 2018)

An Energy-Efficient NoC Router with Adaptive Fault-Tolerance Using Channel Slicing and On-Demand TMR. - Cheng Li 011; Mo Yang; Paul Ampadu (IEEE Trans. Emerg. Top. Comput., 2018)

FIMA: Fault Intensity Map Analysis. - Keyvan Ramezanpour; Paul Ampadu; William Diehl (COSADE, 2019)

An Asymmetric Dual Output On-Chip DC-DC Converter for Dynamic Workloads. - Xingye Liu; Paul Ampadu (ACM Great Lakes Symposium on VLSI, 2019)

Approximate Memory with Approximate DCT. - Shenghou Ma; Paul Ampadu (ACM Great Lakes Symposium on VLSI, 2019)

Approximate Communication Strategies for Energy-Efficient and High Performance NoC: Opportunities and Challenges. - Md Farhadur Reza; Paul Ampadu (ACM Great Lakes Symposium on VLSI, 2019)

Enabling Approximate Storage through Lossy Media Data Compression. - Brian Worek; Paul Ampadu (ACM Great Lakes Symposium on VLSI, 2019)

A Statistical Fault Analysis Methodology for the Ascon Authenticated Cipher. - Keyvan Ramezanpour; Paul Ampadu; William Diehl (HOST, 2019)

A Novel Single-Input-Multiple-Output DC/DC Converter for Distributed Power Management in Many-Core Systems. - Xingye Liu; Paul Ampadu (MWSCAS, 2019)

Self-decompressing FPGA Bitstreams. - Shenghou Ma; Paul Ampadu (MWSCAS, 2019)

Optimal SAT-based Minimum Adder Synthesis of Linear Transformations. - Shenghou Ma; Paul Ampadu (MWSCAS, 2019)

Energy-efficient and high-performance NoC architecture and mapping solution for deep neural networks. - Md Farhadur Reza; Paul Ampadu (NOCS, 2019)

RS-Mask: Random Space Masking as an Integrated Countermeasure against Power and Fault Analysis. - Keyvan Ramezanpour; Paul Ampadu; William Diehl (HOST, 2020)

SCARL: Side-Channel Analysis with Reinforcement Learning on the Ascon Authenticated Cipher. - Keyvan Ramezanpour; Paul Ampadu; William Diehl (CoRR, 2020)

SCAUL: Power Side-Channel Analysis With Unsupervised Learning. - Keyvan Ramezanpour; Paul Ampadu; William Diehl (IEEE Trans. Computers, 2020)

Distributed On-Chip Power Supply for Security Enhancement in Multicore NoC. - Xingye Liu; Paul Ampadu (SoCC, 2021)

Fault intensity map analysis with neural network key distinguisher. - Keyvan Ramezanpour; Paul Ampadu; William Diehl (J. Cryptogr. Eng., 2021)

A Scalable Single-Input-Multiple-Output DC/DC Converter with Enhanced Load Transient Response and Security for Low-Power SoCs. - Xingye Liu; Paul Ampadu (ISCAS, 2022)

A Scalable Integrated DC/DC Converter with Enhanced Load Transient Response and Security for Emerging SoC Applications. - Xingye Liu; Paul Ampadu (MWSCAS, 2022)

A Scalable DC/DC Converter with Fast Load Transient Response and Security Improvement. - Xingye Liu; Paul Ampadu (SOCC, 2022)

Efficient Low-bit-width Activation Function Implementations for Ultra Low Power SoCs. - Shenghou Ma; Paul Ampadu (SOCC, 2022)

A Fast Transient Response Distributed Power Supply With Dynamic Output Switching for Power Side-Channel Attack Mitigation. - Xingye Liu; Paul Ampadu (IEEE Trans. Very Large Scale Integr. Syst., 2025)