A fine-grained reconfigurable logic array based on double gate transistors. - Paul Beckett (FPT, 2002)

Exploiting multiple functionality for nano-scale reconfigurable systems. - Paul Beckett (ACM Great Lakes Symposium on VLSI, 2003)

A Polymorphic Hardware Platform. - Paul Beckett (IPDPS, 2003)

Low-power circuits using dynamic threshold devices. - Paul Beckett (ACM Great Lakes Symposium on VLSI, 2005)

Low-power spatial computing using dynamic threshold devices. - Paul Beckett (ISCAS (3), 2005)

Why area might reduce power in nanoscale CMOS. - Paul Beckett; Seth Copen Goldstein (ISCAS (3), 2005)

Soft Error Rate Estimation in Deep Sub-micron CMOS. - Lianlian Zeng; Paul Beckett (PRDC, 2007)

A Low-Power Reconfigurable Logic Array Based on Double-Gate Transistors. - Paul Beckett (IEEE Trans. Very Large Scale Integr. Syst., 2008)

Towards a balanced ternary FPGA. - Paul Beckett (FPT, 2009)

Power scalability in a mesh-connected reconfigurable architecture. - Paul Beckett (ACM Trans. Embed. Comput. Syst., 2009)

Run. - Paul Beckett; Heiko Rudolph (DELTA, 2010)

A Radiation Hard Lut Block with Auto-Scrubbing. - Kashfia Haque; Paul Beckett (FPL, 2011)

A SOI EEPROM Based Configuration Cell with Simple Scrubbing Detection. - Kashfia Haque; Paul Beckett (VLSI Design, 2011)

Reconfigurable Blocks Based on Balanced Ternary. - Paul Beckett; Tayab Din Memon (J. Signal Process. Syst., 2012)

POWER-Area-Performance Characteristics of FPGA-based Sigma-Delta FIR Filters. - Tayab Din Memon; Paul Beckett; Amin Z. Sadik (J. Signal Process. Syst., 2013)

Design Techniques for NCL-Based Asynchronous Circuits on Commercial FPGA. - Matthew M. Kim; Paul Beckett (DSD, 2014)

A dual-rail LUT for reconfigurable logic using null convention logic. - Jing Yu 014; Paul Beckett (ACM Great Lakes Symposium on VLSI, 2014)

Radiation-Hard Field-Programmable Gate Arrays Configuration Technique Using Silicon on Sapphire. - Kashfia Haque; Paul Beckett (IEEE Trans. Very Large Scale Integr. Syst., 2014)

Low Power Spatial Computing Using Null Convention Logic. - Kashfia Haque; Conrad Jakob; Paul Beckett (DSDIS, 2015)

Design of asynchronous RISC CPU register-file Write-Back queue. - Matthew M. Kim; Karl M. Fant; Paul Beckett (VLSI-SoC, 2015)

Redesigning the Trans-disciplinary: Working Across Design, Craft and Technological Boundaries to Deliver an Integrated Wearable for Cardiac Monitoring. - Leah Heiss; Paul Beckett; Amy Carr-Bottomley (Conference on Designing Interactive Systems, 2016)

A high throughput, low latency null convention logic 16×16-bit multiplier. - Prashant Dabholkar; Paul Beckett (ICSPCS, 2016)

The Bel array: An asynchronous fine-grained co-processor for DSP. - Andrew Przybylski; Kashfia Haque; Paul Beckett (ICSPCS, 2016)

An asynchronous short word length Delta-Sigma FIR filter for low power DSP. - Renuka Sovani; Prashant Dabholkar; Paul Beckett (ICSPCS, 2016)

A low latency asynchronous Jenkins hash engine for IP lookup. - Prashant Dabholkar; Renuka Sovani; Paul Beckett (ISCAS, 2016)

Asynchronous interleaved scan architecture for on-line built-in self-test of null convention logic. - Nastaran Nemati; Mark C. Reed; Karl M. Fant; Paul Beckett (ISCAS, 2016)

The Bel array: asynchronous fine-grained reconfigurable co-processing. - Andrew Przybylski; Kashfia Haque; Paul Beckett (ACSW, 2017)

Usability of LoRaWAN Technology in a Central Business District. - Peter J. Radcliffe; Karina Gomez Chavez; Paul Beckett; Justin Spangaro; Conrad Jakob (VTC Spring, 2017)

FPGA Based Implementation and Area Performance Analysis of Sigma-Delta Modulated Steepest Algorithm for Channel Equalization. - Tayab Din Memon; Aneela Pathan; Paul Beckett (ICSPCS, 2018)

Clock-Less DFT-Less Test Strategy for Null Convention Logic. - Nastaran Nemati; Paul Beckett; Mark C. Reed; Karl M. Fant (IEEE Trans. Emerg. Top. Comput., 2018)

A Physical Unclonable Function With Redox-Based Nanoionic Resistive Memory. - Jeeson Kim; Taimur Ahmed; Hussein Nili; Jiawei Yang; Doo Seok Jeong; Paul Beckett; Sharath Sriram; Damith Chinthana Ranasinghe; Omid Kavehei (IEEE Trans. Inf. Forensics Secur., 2018)

TIARA: technology integrated apnea respiration analyser. - Abdur Rahim Mohammad Forkan; Flora D. Salim; Russell Conduit; Paul Beckett; Stephen R. Robinson (UbiComp, 2019)

Optimising Power-Performance in SOI-based Null Convention Logic. - Nguyen Le Huy; Paul Beckett (ICICDT, 2022)

Wavelength-selective wavefront shaping by metasurface. - Zixin Cai; Xin He; Xin Liu; Shijie Tu; Xinjie Sun; Paul Beckett; Aditya Dubey; Arnan Mitchell; Guanghui Ren; Xu Liu 022; Xiang Hao (Frontiers Inf. Technol. Electron. Eng., 2023)