Single Transistor Learning Synapses. - Paul E. Hasler; Chris Diorio; Bradley A. Minch; Carver Mead (NIPS, 1994)

A Silicon Axon. - Bradley A. Minch; Paul E. Hasler; Chris Diorio; Carver Mead (NIPS, 1994)

A High-Resolution Non-Volatile Analog Memory Cell. - Chris Diorio; Sunit Mahajan; Paul E. Hasler; Bradley A. Minch; Carver Mead (ISCAS, 1995)

Single Transistor Learning Synapse with Long Term Storage. - Paul E. Hasler; Chris Diorio; Bradley A. Minch; Carver Mead (ISCAS, 1995)

A vMOS Soft-Maximum Current Mirror. - Bradley A. Minch; Chris Diorio; Paul E. Hasler; Carver Mead (ISCAS, 1995)

An Adaptive WTA using Floating Gate Technology. - W. Fritz Kruger; Paul E. Hasler; Bradley A. Minch; Christof Koch (NIPS, 1996)

Impact Ionization and Hot-Electron Injection Derived Consistently from Boltzmann Transport. - Paul E. Hasler; Andreas G. Andreou; Chris Diorio; Bradley A. Minch; Carver A. Mead (VLSI Design, 1998)

Adaptive Circuits Using pFET Floating-Gate Devices. - Paul E. Hasler; Bradley A. Minch; Chris Diorio (ARVLSI, 1999)

Correlation learning rule in floating-gate pFET synapses. - Paul E. Hasler; Jeff Dugger (ISCAS (5), 1999)

Floating-gate devices: they are not just for digital memories any more. - Paul E. Hasler; Bradley A. Minch; Chris Diorio (ISCAS (2), 1999)

An autozeroing floating-gate amplifier with gain adaptation. - Paul E. Hasler; Paul D. Smith (ISCAS (2), 1999)

A floating-gate technology for digital CMOS processes. - Bradley A. Minch; Paul E. Hasler (ISCAS (2), 1999)

Synthesis of multiple-input translinear element networks. - Bradley A. Minch; Paul E. Hasler; Chris Diorio (ISCAS (2), 1999)

A floating-gate pFET based CMOS programmable analog memory cell array. - Julian A. Bragg; Reid R. Harrison; Paul E. Hasler; Stephen P. DeWeerth (ISCAS, 2000)

A programmable continuous-time analog Fourier processor based on floating-gate devices. - Matt Kucic; Ai Chen Low; Paul E. Hasler (ISCAS, 2000)

Synchrony detection for spike-mediated computation. - Charles S. Wilson; Paul E. Hasler; Stephen P. DeWeerth (ISCAS, 2000)

Programmable and Adaptive Analog Filters using Arrays of Floating-Gate Circuits. - Matt Kucic; Paul E. Hasler; Jeff Dugger; David V. Anderson (ARVLSI, 2001)

Field-Programmable Analog Arrays: A Floating-Gate Approach. - Tyson S. Hall; Paul E. Hasler; David V. Anderson (FPL, 2002)

Cooperative analog-digital signal processing. - Paul E. Hasler; David V. Anderson (ICASSP, 2002)

Analog speech recognition project. - Paul D. Smith; Paul E. Hasler (ICASSP, 2002)

Continuous-time audio noise suppression and real-time implementation. - Heejong Yoo; David V. Anderson; Paul E. Hasler (ICASSP, 2002)

A CMOS imager with real-time frame differencing and centroid computation. - Richard A. Blum; Charles S. Wilson; Paul E. Hasler; Stephen P. DeWeerth (ISCAS (3), 2002)

A silicon model of an adapting motoneuron. - Julian A. Bragg; Edgar A. Brown; Paul E. Hasler; Stephen P. DeWeerth (ISCAS (4), 2002)

Practical issues using e-pot circuits. - C. Duffy; Ethan Farquhar; Paul E. Hasler (ISCAS (5), 2002)

Biological learning modeled in an adaptive floating-gate system. - Christal Gordon; Paul E. Hasler (ISCAS (5), 2002)

Capacitively-coupled current conveyer second-order section for continuous-time bandpass filtering and cochlea modeling. - David W. Graham; Paul E. Hasler (ISCAS (5), 2002)

A matrix transform imager allowing high-fill factor. - Paul E. Hasler; Abhishek Bandyopadhyay; Paul D. Smith (ISCAS (3), 2002)

Empirical comparison of analog and digital auditory preprocessing for automatic speech recognition. - T. M. Massengill; Denise M. Wilson; Paul E. Hasler; David W. Graham (ISCAS (5), 2002)

A CMOS coupled nonlinear oscillator array. - Joseph D. Neff; Brian K. Meadows; Edgar A. Brown; Stephen P. DeWeerth; Paul E. Hasler (ISCAS (4), 2002)

Mel-frequency cepstrum encoding in analog floating-gate circuitry. - Paul D. Smith; Matt Kucic; Richard Ellis; Paul E. Hasler; David V. Anderson (ISCAS (4), 2002)

Accurate programming of analog floating-gate arrays. - Paul D. Smith; Matt Kucic; Paul E. Hasler (ISCAS (5), 2002)

Nonlinear antenna technology. - Brian K. Meadows; Ted H. Heath; Joseph D. Neff; Edgar A. Brown; David W. Fogliatti; Michael Gabbay 003; Visarath In; Paul E. Hasler; Stephen P. DeWeerth; William L. Ditto (Proc. IEEE, 2002)

A fully programmable CMOS block matrix transform imager architecture. - Abhishek Bandyopadhyay; Paul E. Hasler (CICC, 2003)

High Fill-Factor Imagers for Neuromorphic Processing Enabled by Floating-Gate Circuits. - Paul E. Hasler; Abhishek Bandyopadhyay; David V. Anderson (EURASIP J. Adv. Signal Process., 2003)

An analog VLSI model of muscular contraction. - Tina A. Hudson; Julian A. Bragg; Paul E. Hasler; Stephen P. DeWeerth (IEEE Trans. Circuits Syst. II Express Briefs, 2003)

A 531 nW/MHz, 128×32 current-mode programmable analog vector-matrix multiplier with over two decades of linearity. - Ravi Chawla; Abhishek Bandyopadhyay; Venkatesh Srinivasan; Paul E. Hasler (CICC, 2004)

Developing Large-Scale Field-Programmable Analog Arrays. - Tyson S. Hall; Christopher M. Twigg; Paul E. Hasler; David V. Anderson (IPDPS, 2004)

A programmable coefficient continuous-time A/D Delta-Sigma modulator. - Daniel J. Allen; Angelo W. Pereira; Paul E. Hasler (ISCAS (1), 2004)

A fully programmable log-domain bandpass filter using multiple-input translinear elements. - Ravi Chawla; Haw-Jing Lo; Arindam Basu; Paul E. Hasler; Bradley A. Minch (ISCAS (1), 2004)

Fully differential floating-gate programmable OTAs with novel common-mode feedback. - Ravi Chawla; Guillermo J. Serrano; Daniel J. Allen; Angelo W. Pereira; Paul E. Hasler (ISCAS (1), 2004)

Supervised learning in a two-input analog floating-gate node. - Jeff Dugger; Paul E. Hasler (ISCAS (5), 2004)

A reconfigurable bidirectional active 2 dimensional dendrite model. - Ethan Farquhar; David N. Abramson; Paul E. Hasler (ISCAS (1), 2004)

A family of floating-gate adapting synapses based upon transistor channel models. - Christal Gordon; Ethan Farquhar; Paul E. Hasler (ISCAS (1), 2004)

A programmable bandpass array using floating-gate elements. - David W. Graham; Paul D. Smith; Richard Ellis; Ravi Chawla; Paul E. Hasler (ISCAS (1), 2004)

Application performance of elements in a floating-gate FPAA. - Tyson S. Hall; Christopher M. Twigg; Paul E. Hasler; David V. Anderson (ISCAS (2), 2004)

5V-only, standard 0.5μm CMOS programmable and adaptive floating-gate circuits and arrays using CMOS charge pumps. - Mark Hooper; Matt Kucic; Paul E. Hasler (ISCAS (5), 2004)

Characterization of charge-pump rectifiers for standard submicron CMOS processes. - Mark Hooper; Matt Kucic; Paul E. Hasler (ISCAS (5), 2004)

Programmable multiple input translinear elements. - Haw-Jing Lo; Guillermo J. Serrano; Paul E. Hasler; David V. Anderson; Bradley A. Minch (ISCAS (1), 2004)

Programmable voltage-output, floating-gate digital-analog converter. - Erhan Ozalevli; Paul E. Hasler; Farhan Adil (ISCAS (1), 2004)

A 0.5µm CMOS programmable discrete-time Delta-Sigma modulator with floating gate elements. - Angelo W. Pereira; Daniel J. Allen; Paul E. Hasler (ISCAS (1), 2004)

A floating-gate DAC array. - Guillermo J. Serrano; Paul E. Hasler (ISCAS (1), 2004)

Automatic rapid programming of large arrays of floating-gate elements. - Guillermo J. Serrano; Paul D. Smith; Haw-Jing Lo; Ravi Chawla; Tyson S. Hall; Christopher M. Twigg; Paul E. Hasler (ISCAS (1), 2004)

A five-transistor bandpass filter element. - Paul D. Smith; David W. Graham; Ravi Chawla; Paul E. Hasler (ISCAS (1), 2004)

Synthesis of static multiple input multiple output MITE networks. - Shyam Subramanian; David V. Anderson; Paul E. Hasler (ISCAS (1), 2004)

C4 band-pass delay filter for continuous-time subband adaptive tapped-delay filter. - Heejong Yoo; David W. Graham; David V. Anderson; Paul E. Hasler (ISCAS (5), 2004)

A precision CMOS amplifier using floating-gates for offset cancellation. - Srinivasan Venkatesh 003; Guillermo J. Serrano; Jordan D. Gray; Paul E. Hasler (CICC, 2005)

Design of a CMOS floating-gate resistor for highly linear amplifier and multiplier applications. - Erhan Ozalevli; Paul E. Hasler (CICC, 2005)

Image processing system using a programmable transform imager. - Jungwon Lee; Abhishek Bandyopadhyay; I. Faik Baskaya; Ryan W. Robucci; Paul E. Hasler (ICASSP (5), 2005)

Characteristics and programming of floating-gate pFET switches in an FPAA crossbar network. - David N. Abramson; Jordan D. Gray; Christopher M. Twigg; Paul E. Hasler (ISCAS (1), 2005)

A 80µW/frame 104×128 CMOS imager front end for JPEG compression. - Abhishek Bandyopadhyay; Jungwon Lee; Ryan W. Robucci; Paul E. Hasler (ISCAS (5), 2005)

Programming analog computational memory elements to 0.2% accuracy over 3.5 decades using a predictive method. - Abhishek Bandyopadhyay; Guillermo J. Serrano; Paul E. Hasler (ISCAS (3), 2005)

Offset compensation in flash ADCs using floating-gate circuits. - Philomena C. Brady; Paul E. Hasler (ISCAS (6), 2005)

An analog modulator/demodulator using a programmable arbitrary waveform generator. - Ravi Chawla; Christopher M. Twigg; Paul E. Hasler (ISCAS (6), 2005)

Programmable floating-gate techniques for CMOS inverters. - Brian P. Degnan; Richard B. Wunderlich; Paul E. Hasler (ISCAS (3), 2005)

A low-power, programmable bandpass filter section for higher-order filter-bank applications. - David W. Graham; Paul D. Smith; Richard Ellis; Ravi Chawla; Paul E. Hasler (ISCAS (3), 2005)

Integration of high voltage charge-pumps in a submicron standard CMOS process for programming analog floating-gate circuits. - Mark Hooper; Matt Kucic; Paul E. Hasler (ISCAS (1), 2005)

Programmable floating-gate CMOS resistors. - Erhan Ozalevli; Paul E. Hasler (ISCAS (3), 2005)

10-bit programmable voltage-output digital-analog converter. - Erhan Ozalevli; Christopher M. Twigg; Paul E. Hasler (ISCAS (6), 2005)

A programmable floating-gate bump circuit with variable width. - Sheng-Yu Peng; Bradley A. Minch; Paul E. Hasler (ISCAS (5), 2005)

An adaptive analog synapse circuit that implements the least-mean-square learning rule. - Srinivasan Venkatesh 003; Jeff Dugger; Paul E. Hasler (ISCAS (5), 2005)

Synthesis of MITE log-domain filters with unique operating points. - Shyam Subramanian; David V. Anderson; Paul E. Hasler; Bradley A. Minch (ISCAS (2), 2005)

A spiking silicon central pattern generator with floating gate synapses [robot control applications]. - Francesco Tenore; R. Jacob Vogelstein; Ralph Etienne-Cummings; Gert Cauwenberghs; M. Anthony Lewis; Paul E. Hasler (ISCAS (4), 2005)

A Field-Programmable Analog Array Using Translinear Elements. - David N. Abramson; Jordan D. Gray; Shyam Subramanian; Paul E. Hasler (IWSOC, 2005)

Low-Power Programmable Signal Processing, invited. - Paul E. Hasler (IWSOC, 2005)

Floating-Gate Devices, Circuits, and Systems, invited. - Paul E. Hasler (IWSOC, 2005)

Programmable Low Dropout Voltage Regulator. - Paul E. Hasler; AiChen Low (IWSOC, 2005)

Towards Low-Power On-chip Auditory Processing. - Sourabh Ravindran; Paul D. Smith; David W. Graham; Varinthira Duangudom; David V. Anderson; Paul E. Hasler (EURASIP J. Adv. Signal Process., 2005)

Developing large-scale field-programmable analog arrays for rapid prototyping. - Tyson S. Hall; Christopher M. Twigg; Paul E. Hasler; David V. Anderson (Int. J. Embed. Syst., 2005)

A bio-physically inspired silicon neuron. - Ethan Farquhar; Paul E. Hasler (IEEE Trans. Circuits Syst. I Regul. Pap., 2005)

Large-scale field-programmable analog arrays for analog signal processing. - Tyson S. Hall; Christopher M. Twigg; Jordan D. Gray; Paul E. Hasler; David V. Anderson (IEEE Trans. Circuits Syst. I Regul. Pap., 2005)

An analog floating-gate node for Supervised learning. - Paul E. Hasler; Jeff Dugger (IEEE Trans. Circuits Syst. I Regul. Pap., 2005)

Design of a binary-weighted resistor DAC using tunable linearized floating-gate CMOS resistors. - Erhan Ozalevli; Hüseyin Dinc; Haw-Jing Lo; Paul E. Hasler (CICC, 2006)

A Floating-gate Based Low-Power Capacitive Sensing Interface Circuit. - Sheng-Yu Peng; Muhammad Shakeel Qureshi; Arindam Basu; Paul E. Hasler; Levent Degertekin (CICC, 2006)

A Compact Programmable CMOS Reference With ±40μV Accuracy. - Srinivasan Venkatesh 003; Guillermo J. Serrano; Christopher M. Twigg; Paul E. Hasler (CICC, 2006)

A Large-Scale Reconfigurable Analog Signal Processor (RASP) IC. - Christopher M. Twigg; Paul E. Hasler (CICC, 2006)

Building large networks of biological neurons. - Paul E. Hasler; Ethan Farquhar; Christal Gordon (EMBC (Supplement), 2006)

Chemical Source Localization in Unknown Turbulence Using the Cross-Correlation Method. - Gail L. Rosen; Paul E. Hasler (ICASSP (3), 2006)

A rail to rail, slew-boosted pre-charge buffer. - H. Dine; S. Chuang; Phillip E. Allen; Paul E. Hasler (ISCAS, 2006)

A field programmable neural array. - Ethan Farquhar; Christal Gordon; Paul E. Hasler (ISCAS, 2006)

An artificial synapse for interfacing to biological neurons. - Christal Gordon; Amanda Preyer; Karolyn Babalola; Robert J. Butera; Paul E. Hasler (ISCAS, 2006)

A tunable floating gate CMOS resistor for low-power and low-voltage applications. - Erhan Ozalevli; Paul E. Hasler (ISCAS, 2006)

Low-voltage floating-gate CMOS buffer. - Erhan Ozalevli; Muhammad Shakeel Qureshi; Paul E. Hasler (ISCAS, 2006)

High SNR capacitive sensing transducer. - Sheng-Yu Peng; Muhammad Shakeel Qureshi; Paul E. Hasler; Neal A. Hall; F. L. Degertekin (ISCAS, 2006)

A floating-gate programmable array of silicon neurons for central pattern generating networks. - Francesco Tenore; R. Jacob Vogelstein; Ralph Etienne-Cummings; Gert Cauwenberghs; Paul E. Hasler (ISCAS, 2006)

MATIA: a programmable 80 WμW/frame CMOS block matrix transform imager architecture. - Abhishek Bandyopadhyay; Jungwon Lee; Ryan W. Robucci; Paul E. Hasler (IEEE J. Solid State Circuits, 2006)

Adaptive Algorithm Using Hot-Electron Injection for Programming Analog Computational Memory Elements Within 0.2% of Accuracy Over 3.5 Decades. - Abhishek Bandyopadhyay; Guillermo J. Serrano; Paul E. Hasler (IEEE J. Solid State Circuits, 2006)

Winner-Take-All-Based Visual Motion Sensors. - Erhan Özalevli; Paul E. Hasler; Charles M. Higgins (IEEE Trans. Circuits Syst. II Express Briefs, 2006)

Rapid Prototyping of Large-scale Analog Circuits With Field Programmable Analog Array. - I. Faik Baskaya; Brian Gestner; Christopher M. Twigg; Sung Kyu Lim; David V. Anderson; Paul E. Hasler (FCCM, 2007)

Large-Scale FPAA Devices for Signal Processing Applications. - Christopher M. Twigg; Paul E. Hasler; David V. Anderson (ICASSP (2), 2007)

A Fully Integrated Architecture for Fast Programming of Floating Gates. - Arindam Basu; Paul E. Hasler (ISCAS, 2007)

Dynamics of a Logarithmic Transimpedance Amplifier. - Arindam Basu; Kofi M. Odame; Paul E. Hasler (ISCAS, 2007)

Run-Time Programming of Analog Circuits Using Floating-Gate Transistors. - David W. Graham; Paul E. Hasler (ISCAS, 2007)

Above Threshold pFET InjectionModeling intended for ProgrammingFloating-Gate Systems. - Paul E. Hasler; Arindam Basu; Sctt Kozil (ISCAS, 2007)

Transistor Channel Dendrites implementing HMM classifiers. - Paul E. Hasler; Scott Koziol; Ethan Farquhar; Arindam Basu (ISCAS, 2007)

An OTA-based Large-Scale Field Programmable Analog Array (FPAA) for faster On-Chip Communication and Computation. - Paul E. Hasler; Christopher M. Twigg (ISCAS, 2007)

An Efficient Oscillator Design Based on OTA Nonlinearity. - Kofi M. Odame; Paul E. Hasler (ISCAS, 2007)

An Adaptive Quality-Factor Bandpass Filter. - Kofi M. Odame; Paul E. Hasler (ISCAS, 2007)

Studying Nonlinear Dynamical Systems on a Reconfigurable Analog Platform. - Kofi M. Odame; Christopher M. Twigg; Arindam Basu; Paul E. Hasler (ISCAS, 2007)

VLSI Implementation of a Reconfigurable Mixed-Signal Finite Impulse Response Filter. - Erhan Ozalevli; Walter Huang; Paul E. Hasler; David V. Anderson (ISCAS, 2007)

Optimal Synthesis of MITE Translinear Loops. - Shyam Subramanian; David V. Anderson; Paul E. Hasler; Bradley A. Minch (ISCAS, 2007)

Programmable Floating Gate FPAA Switches Are Not Dead Weight. - Christopher M. Twigg; Jordan D. Gray; Paul E. Hasler (ISCAS, 2007)

Programmable Conductance Switches for FPAAs. - Christopher M. Twigg; Paul E. Hasler (ISCAS, 2007)

A Self-Contained Large-Scale FPAA Development Platform. - Christopher M. Twigg; Paul E. Hasler; I. Faik Baskaya (ISCAS, 2007)

Capacitively-Biased Floating-Gate CMOS: a New Logic Family. - Richard B. Wunderlich; Brian P. Degnan; Paul E. Hasler (ISCAS, 2007)

Incorporating Large-Scale FPAAs in Analog Design Courses. - Christopher M. Twigg; Paul E. Hasler (MSE, 2007)

An analog programmable multi-dimensional radial basis function based classifier. - Sheng-Yu Peng; Paul E. Hasler; David V. Anderson (VLSI-SoC, 2007)

A Programmable Multi-Dimensional Analog Radial-Basis- Function-Based Classifier. - Sheng-Yu Peng; Paul E. Hasler; David V. Anderson (VLSI-SoC (Selected Papers), 2007)

A Precision CMOS Amplifier Using Floating-Gate Transistors for Offset Cancellation. - Srinivasan Venkatesh 003; Guillermo J. Serrano; Jordan D. Gray; Paul E. Hasler (IEEE J. Solid State Circuits, 2007)

A Low-Power, Compact, Adaptive Logarithmic Transimpedance Amplifier Operating Over Seven Decades of Current. - Arindam Basu; Ryan W. Robucci; Paul E. Hasler (IEEE Trans. Circuits Syst. I Regul. Pap., 2007)

Programmable Gm- C Filters Using Floating-Gate Operational Transconductance Amplifiers. - Ravi Chawla; Farhan Adil; Guillermo J. Serrano; Paul E. Hasler (IEEE Trans. Circuits Syst. I Regul. Pap., 2007)

Indirect Programming of Floating-Gate Transistors. - David W. Graham; Ethan Farquhar; Brian P. Degnan; Christal Gordon; Paul E. Hasler (IEEE Trans. Circuits Syst. I Regul. Pap., 2007)

A Low-Power Programmable Bandpass Filter Section for Higher Order Filter Applications. - David W. Graham; Paul E. Hasler; Ravi Chawla; Paul D. Smith (IEEE Trans. Circuits Syst. I Regul. Pap., 2007)

An Analog Programmable Multidimensional Radial Basis Function Based Classifier. - Sheng-Yu Peng; Paul E. Hasler; David V. Anderson (IEEE Trans. Circuits Syst. I Regul. Pap., 2007)

RASP 2.8: A new generation of floating-gate based field programmable analog array. - Arindam Basu; Christopher M. Twigg; Stephen Brink; Paul E. Hasler; Csaba Petre; Shubha Ramakrishnan; Scott Koziol; Craig Schlottmann (CICC, 2008)

A programmable analog radial-basis-function based classifier. - Sheng-Yu Peng; Yu Tsao 001; Paul E. Hasler; David V. Anderson (ICASSP, 2008)

Compressive sensing on a CMOS separable transform image sensor. - Ryan W. Robucci; Leung Kin Chiu; Jordan D. Gray; Justin K. Romberg; Paul E. Hasler; David V. Anderson (ICASSP, 2008)

Bifurcations in a silicon neuron. - Arindam Basu; Csaba Petre; Paul E. Hasler (ISCAS, 2008)

A biophysically based dendrite model using programmable floating-gate devices. - Stephen Brink; Scott Koziol; Shubha Ramakrishnan; Paul E. Hasler (ISCAS, 2008)

A floating-gate transistor based continuous-time analog adaptive filter. - Jordan D. Gray; Srinivasan Venkatesh 003; Ryan W. Robucci; Paul E. Hasler (ISCAS, 2008)

Analog VLSI implementation of support vector machine learning and classification. - Sheng-Yu Peng; Bradley A. Minch; Paul E. Hasler (ISCAS, 2008)

Automated conversion of Simulink designs to analog hardware on an FPAA. - Csaba Petre; Craig Schlottmann; Paul E. Hasler (ISCAS, 2008)

A 256×256 separable transform CMOS imager. - Ryan W. Robucci; Jordan D. Gray; David Abramson 002; Paul E. Hasler (ISCAS, 2008)

A Precision Low-TC Wide-Range CMOS Current Reference. - Guillermo J. Serrano; Paul E. Hasler (IEEE J. Solid State Circuits, 2008)

A Bandpass Filter With Inherent Gain Adaptation for Hearing Applications. - Kofi M. Odame; David V. Anderson; Paul E. Hasler (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

Tunable Highly Linear Floating-Gate CMOS Resistor Using Common-Mode Linearization Technique. - Erhan Özalevli; Paul E. Hasler (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

A Reconfigurable Mixed-Signal VLSI Implementation of Distributed Arithmetic Used for Finite-Impulse Response Filtering. - Erhan Özalevli; Walter Huang; Paul E. Hasler; David V. Anderson (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

Binary-Weighted Digital-to-Analog Converter Design Using Floating-Gate Voltage References. - Erhan Özalevli; Haw-Jing Lo; Paul E. Hasler (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

A Charge-Based Low-Power High-SNR Capacitive Sensing Interface Circuit. - Sheng-Yu Peng; Muhammad Shakeel Qureshi; Paul E. Hasler; Arindam Basu; Levent Degertekin (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

A Floating-Gate-Based Programmable CMOS Reference. - Srinivasan Venkatesh 003; Guillermo J. Serrano; Christopher M. Twigg; Paul E. Hasler (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

Incorporating Large-Scale FPAAs Into Analog Design and Test Courses. - Christopher M. Twigg; Paul E. Hasler (IEEE Trans. Educ., 2008)

A learning digital computer. - Bo Marr; Arindam Basu; Stephen Brink; Paul E. Hasler (DAC, 2009)

A generic reconfigurable array specification and programming environment (GRASPER). - Faik Baskaya; David V. Anderson; Paul E. Hasler; Sung Kyu Lim (ECCTD, 2009)

Compact floating-gate learning array with STDP. - Mikko Pänkäälä; Mika Laiho; Paul E. Hasler (IJCNN, 2009)

Passgate Resistance Estimation based on the Compact EKV Model and Effective Mobility. - Brian P. Degnan; Richard B. Wunderlich; Paul E. Hasler (ISCAS, 2009)

An Asynchronously Embedded Datapath for Performance Acceleration and Energy Efficiency. - Bo Marr; Brian P. Degnan; Paul E. Hasler; David V. Anderson (ISCAS, 2009)

A Large-scale Reconfigurable Smart Sensory Chip. - Sheng-Yu Peng; Gokce Gurun; Christopher M. Twigg; Muhammad Shakeel Qureshi; Arindam Basu; Stephen Brink; Paul E. Hasler; Levent Degertekin (ISCAS, 2009)

Implementation of a Hebbian chemoreceptor model for diffusive source localization. - Gail Rosen; Paul E. Hasler; Mark T. Smith (Biosyst., 2009)

Configurable analog signal processing. - Christopher M. Twigg; Paul E. Hasler (Digit. Signal Process., 2009)

Theory and Design of OTA-C Oscillators with Native Amplitude Limiting. - Kofi M. Odame; Paul E. Hasler (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

Vector matrix multiplier on field programmable analog array. - Craig Schlottmann; Csaba Petre; Paul E. Hasler (ICASSP, 2010)

Neural dynamics in reconfigurable silicon. - Arindam Basu; Shubha Ramakrishnan; Paul E. Hasler (ISCAS, 2010)

Crossbar switch matrix for floating-gate programming over large current ranges. - Brian P. Degnan; Brian J. Duffy; Paul E. Hasler (ISCAS, 2010)

Live demonstration: Hardware and software infrastructure for a family of floating-gate based FPAAs. - Scott Koziol; Craig Schlottmann; Arindam Basu; Stephen Brink; Csaba Petre; Brian P. Degnan; Shubha Ramakrishnan; Paul E. Hasler; Aurele Balavoine (ISCAS, 2010)

Hardware and software infrastructure for a family of floating-gate based FPAAs. - Scott Koziol; Craig Schlottmann; Arindam Basu; Stephen Brink; Csaba Petre; Brian P. Degnan; Shubha Ramakrishnan; Paul E. Hasler; Aurele Balavoine (ISCAS, 2010)

Integrated low voltage and low power CMOS circuits for optical sensing of diffraction based micromachined microphone. - Muhammad Shakeel Qureshi; Arindam Basu; Baris Bicen; Levent Degertekin; Paul E. Hasler (ISCAS, 2010)

Reducing offset errors in MITE systems by precise floating gate programming. - Craig Schlottmann; Brian P. Degnan; David Abramson 002; Paul E. Hasler (ISCAS, 2010)

A Floating-Gate-Based Field-Programmable Analog Array. - Arindam Basu; Stephen Brink; Craig Schlottmann; Shubha Ramakrishnan; Csaba Petre; Scott Koziol; I. Faik Baskaya; Christopher M. Twigg; Paul E. Hasler (IEEE J. Solid State Circuits, 2010)

Compressive Sensing on a CMOS Separable-Transform Image Sensor. - Ryan W. Robucci; Jordan D. Gray; Leung Kin Chiu; Justin K. Romberg; Paul E. Hasler (Proc. IEEE, 2010)

Dynamics and Bifurcations in a Silicon Neuron. - Arindam Basu; Csaba Petre; Paul E. Hasler (IEEE Trans. Biomed. Circuits Syst., 2010)

Neural Dynamics in Reconfigurable Silicon. - Arindam Basu; Shubha Ramakrishnan; Csaba Petre; Scott Koziol; Stephen Brink; Paul E. Hasler (IEEE Trans. Biomed. Circuits Syst., 2010)

Nullcline-Based Design of a Silicon Neuron. - Arindam Basu; Paul E. Hasler (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

Error Immune Logic for Low-Power Probabilistic Computing. - Bo Marr; Jason George; Brian P. Degnan; David V. Anderson; Paul E. Hasler (VLSI Design, 2010)

Nonlinear Circuit Analysis via Perturbation Methods and Hardware Prototyping. - Kofi M. Odame; Paul E. Hasler (VLSI Design, 2010)

Reconfigurable Analog VLSI circuits for robot path planning. - Scott Koziol; Paul E. Hasler (AHS, 2011)

FPAA chips and tools as the center of an design-based analog systems education. - Paul E. Hasler; Craig Scholttmann; Scott Koziol (MSE, 2011)

Using floating-gate based programmable analog arrays for real-time control of a game-playing robot. - Scott Koziol; David Lenz 001; Sebastian Hilsenbeck; Smriti Chopra; Paul E. Hasler; Ayanna M. Howard (SMC, 2011)

A Highly Dense, Low Power, Programmable Analog Vector-Matrix Multiplier: The FPAA Implementation. - Craig Schlottmann; Paul E. Hasler (IEEE J. Emerg. Sel. Topics Circuits Syst., 2011)

Floating Gate Synapses With Spike-Time-Dependent Plasticity. - Shubha Ramakrishnan; Paul E. Hasler; Christal Gordon (IEEE Trans. Biomed. Circuits Syst., 2011)

Low-Power Discrete Fourier Transform for OFDM: A Programmable Analog Approach. - Sangwook Suh; Arindam Basu; Craig Schlottmann; Paul E. Hasler; John R. Barry (IEEE Trans. Circuits Syst. I Regul. Pap., 2011)

A Fully Integrated Architecture for Fast and Accurate Programming of Floating Gates Over Six Decades of Current. - Arindam Basu; Paul E. Hasler (IEEE Trans. Very Large Scale Integr. Syst., 2011)

Neuron array with plastic synapses and programmable dendrites. - Shubha Ramakrishnan; Richard B. Wunderlich; Paul E. Hasler (BioCAS, 2012)

Neuromorphic hardware for rapid sparse coding. - Samuel A. Shapero; Paul E. Hasler (BioCAS, 2012)

A mixed-mode FPAA SoC for analog-enhanced signal processing. - Craig Schlottmann; Stephen Nease; Samuel A. Shapero; Paul E. Hasler (CICC, 2012)

An analog adaptive beamforming circuit for audio noise reduction. - Jeff Dugger; Paul D. Smith; Matt Kucic; Paul E. Hasler (ICASSP, 2012)

FPAA empowering cooperative analog-digital signal processing. - Craig Schlottmann; Paul E. Hasler (ICASSP, 2012)

Robot path planning using Field Programmable Analog Arrays. - Scott Koziol; Paul E. Hasler; Mike Stilman (ICRA, 2012)

Low Power Sparse Approximation on Reconfigurable Analog Hardware. - Samuel A. Shapero; Adam S. Charles; Christopher J. Rozell; Paul E. Hasler (IEEE J. Emerg. Sel. Topics Circuits Syst., 2012)

A Digitally Enhanced Dynamically Reconfigurable Analog Platform for Low-Power Signal Processing. - Craig Schlottmann; Samuel A. Shapero; Stephen Nease; Paul E. Hasler (IEEE J. Solid State Circuits, 2012)

An Analog Integrated Circuit Beamformer for High-Frequency Medical Ultrasound Imaging. - Gokce Gurun; Jaime S. Zahorian; Alper Sisman; Mustafa Karaman; Paul E. Hasler; Levent Degertekin (IEEE Trans. Biomed. Circuits Syst., 2012)

Modeling and Implementation of Voltage-Mode CMOS Dendrites on a Reconfigurable Analog Platform. - Stephen Nease; Suma George; Paul E. Hasler; Scott Koziol; Stephen Brink (IEEE Trans. Biomed. Circuits Syst., 2012)

A MITE-Based Translinear FPAA. - Craig Schlottmann; David Abramson 002; Paul E. Hasler (IEEE Trans. Very Large Scale Integr. Syst., 2012)

A High-Level Simulink-Based Tool for FPAA Configuration. - Craig Schlottmann; Csaba Petre; Paul E. Hasler (IEEE Trans. Very Large Scale Integr. Syst., 2012)

STDP-enabled learning on a reconfigurable neuromorphic platform. - Stephen Nease; Stephen Brink; Paul E. Hasler (ECCTD, 2013)

Computing with networks of spiking neurons on a biophysically motivated floating-gate based neuromorphic integrated circuit. - Stephen Brink; Stephen Nease; Paul E. Hasler (Neural Networks, 2013)

Configurable hardware integrate and fire neurons for sparse approximation. - Samuel A. Shapero; Christopher J. Rozell; Paul E. Hasler (Neural Networks, 2013)

A Learning-Enabled Neuron Array IC Based Upon Transistor Channel Models of Biological Phenomena. - Stephen Brink; Stephen Nease; Paul E. Hasler; Shubha Ramakrishnan; Richard B. Wunderlich; Arindam Basu; Brian P. Degnan (IEEE Trans. Biomed. Circuits Syst., 2013)

Mismatch Characterization and Calibration for Accurate and Automated Analog Design. - Samuel A. Shapero; Paul E. Hasler (IEEE Trans. Circuits Syst. I Regul. Pap., 2013)

Scaling Energy Per Operation via an Asynchronous Pipeline. - Bo Marr; Brian P. Degnan; Paul E. Hasler; David V. Anderson (IEEE Trans. Very Large Scale Integr. Syst., 2013)

Floating Gate-Based Field Programmable Mixed-Signal Array. - Richard B. Wunderlich; Farhan Adil; Paul E. Hasler (IEEE Trans. Very Large Scale Integr. Syst., 2013)