Implementation of a Single Chip, Pipelined, Complex, One-Dimensional Fast FourierTransform in 0.25 mu m BulkCMOS. - Steven M. Currie; Paul R. Schumacher; Barry K. Gilbert; Earl E. Swartzlander Jr.; Barbara A. Randall (ASAP, 2002)

High-Level Algorithmic Complexity Analysis for the Implementation of a Motion-JPEG2000 Encoder. - Massimo Ravasi; Marco Mattavelli; Paul R. Schumacher; Robert D. Turney (PATMOS, 2003)

An efficient optimized JPEG 2000 tier-1 coder hardware implementation. - Paul R. Schumacher (VCIP, 2003)

An efficient JPEG2000 tier-1 coder hardware implementation for real-time video processing. - Paul R. Schumacher (IEEE Trans. Consumer Electron., 2003)

A Single Program Multiple Data Parallel Processing Platform for FPGAs. - Philip James-Roxby; Paul R. Schumacher; Charlie Ross (FCCM, 2004)

Memory Efficient Design of an MPEG-4 Video Encoder for FPGAs. - Kristof Denolf; Adrian Chirila-Rus; Robert D. Turney; Paul R. Schumacher; Kees A. Vissers (FPL, 2005)

A scalable, multi-stream MPEG-4 video decoder for conferencing and surveillance applications. - Paul R. Schumacher; Kristof Denolf; Adrian Chirila-Rus; Robert D. Turney; Nick Fedele; Kees A. Vissers; Jan Bormans (ICIP (2), 2005)

A Virtual Socket Framework for Rapid Emulation of Video and Multimedia Designs. - Paul R. Schumacher; Marco Mattavelli; Adrian Chirila-Rus; Robert D. Turney (ICME, 2005)

A Software/Hardware Platform for Rapid Prototyping of Video and Multimedia Designs. - Paul R. Schumacher; Marco Mattavelli; Adrian Chirila-Rus; Robert D. Turney (IWSOC, 2005)

Communication Primitives Driven Hardware Design and Test Methodology Applied on Complex Video Applications. - Adrian Chirila-Rus; Kristof Denolf; Bart Vanhoof; Paul R. Schumacher; Kees A. Vissers (IEEE International Workshop on Rapid System Prototyping, 2005)

A Systematic Approach to Design Low-Power Video Codec Cores. - Kristof Denolf; Adrian Chirila-Rus; Paul R. Schumacher; Robert D. Turney; Kees A. Vissers; Diederik Verkest; Henk Corporaal (EURASIP J. Embed. Syst., 2007)