Performance of FORTRAN and C GPU Extensions for a Benchmark Suite of Fourier Pseudospectral Algorithms. - Rigge Cloutier; Benson K. Muite; Paul Rigge (CoRR, 2012)

Cooperative communication for high-reliability low-latency wireless control. - Vasuki Narasimha Swamy; Sahaana Suri; Paul Rigge; Matthew Weiner; Gireeja Ranade; Anant Sahai; Borivoje Nikolic (ICC, 2015)

Network coding for high-reliability low-latency wireless control. - Vasuki Narasimha Swamy; Paul Rigge; Gireeja Ranade; Anant Sahai; Borivoje Nikolic (WCNC, 2016)

Cooperative Communication for Control over Wireless. - Vasuki Narasimha Swamy; Sahaana Suri; Paul Rigge; Matthew Weiner; Gireeja Ranade; Anant Sahai; Borivoje Nikolic (CoRR, 2016)

Real-Time Cooperative Communication for Automation Over Wireless. - Vasuki Narasimha Swamy; Sahaana Suri; Paul Rigge; Matthew Weiner; Gireeja Ranade; Anant Sahai; Borivoje Nikolic (IEEE Trans. Wirel. Commun., 2017)

A Generated Multirate Signal Analysis RISC-V SoC in 16nm FinFET. - Stevo Bailey; Jaeduk Han; Paul Rigge; Richard Lin; Eric Chang; Howard Mao; Zhongkai Wang; Chick Markley; Adam M. Izraelevitz; Angie Wang; Nathan Narevsky; Woo-Rham Bae; et al. (A-SSCC, 2018)

ACED: a hardware library for generating DSP systems. - Angie Wang; Paul Rigge; Adam M. Izraelevitz; Chick Markley; Jonathan Bachrach; Borivoje Nikolic (DAC, 2018)

A Real-Time, Analog/Digital Co-Designed 1.89-GHz Bandwidth, 175-kHz Resolution Sparse Spectral Analysis RISC-V SoC in 16-nm FinFET. - Angie Wang; Woo-Rham Bae; Jaeduk Han; Stevo Bailey; Paul Rigge; Orhan Ocal; Zhongkai Wang; Kannan Ramchandran; Elad Alon; Borivoje Nikolic (ESSCIRC, 2018)

Predicting Wireless Channels for Ultra-Reliable Low-Latency Communications. - Vasuki Narasimha Swamy; Paul Rigge; Gireeja Ranade; Borivoje Nikolic; Anant Sahai (ISIT, 2018)

Network Coding for Real-time Wireless Communication for Automation. - Vasuki Narasimha Swamy; Paul Rigge; Gireeja Ranade; Anant Sahai; Borivoje Nikolic (CoRR, 2018)

Wireless Channel Dynamics and Robustness for Ultra-Reliable Low-Latency Communications. - Vasuki Narasimha Swamy; Paul Rigge; Gireeja Ranade; Borivoje Nikolic; Anant Sahai (IEEE J. Sel. Areas Commun., 2019)

A Mixed-Signal RISC-V Signal Analysis SoC Generator With a 16-nm FinFET Instance. - Steven Bailey; Paul Rigge; Jaeduk Han; Richard Lin; Eric Chang; Howard Mao; Zhongkai Wang; Chick Markley; Adam M. Izraelevitz; Angie Wang; Nathan Narevsky; Woo-Rham Bae; et al. (IEEE J. Solid State Circuits, 2019)

A Real-Time, 1.89-GHz Bandwidth, 175-kHz Resolution Sparse Spectral Analysis RISC-V SoC in 16-nm FinFET. - Angie Wang; Woo-Rham Bae; Jaeduk Han; Stevo Bailey; Orhan Ocal; Paul Rigge; Zhongkai Wang; Kannan Ramchandran; Elad Alon; Borivoje Nikolic (IEEE J. Solid State Circuits, 2019)

Invited: Chipyard - An Integrated SoC Research and Implementation Environment. - Alon Amid; David Biancolin; Abraham Gonzalez; Daniel Grubb; Sagar Karandikar; Harrison Liew; Albert Magyar; Howard Mao; Albert J. Ou; Nathan Pemberton; Paul Rigge; Colin Schmidt 001; et al. (DAC, 2020)

Wireless Channel Dynamics for Relay Selection under Ultra-Reliable Low-Latency Communication. - Paul Rigge; Vasuki Narasimha Swamy; Christian Nelson; Fredrik Tufvesson; Anant Sahai; Borivoje Nikolic (PIMRC, 2020)

Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs. - Alon Amid; David Biancolin; Abraham Gonzalez; Daniel Grubb; Sagar Karandikar; Harrison Liew; Albert Magyar; Howard Mao; Albert J. Ou; Nathan Pemberton; Paul Rigge; Colin Schmidt 001; et al. (IEEE Micro, 2020)

Generators for Wireless Systems Prototyping - Paul Rigge (2020)