Two-Dimensional Heuristic Augmented Transition Network Parsing. - Paul W. Palumbo (CAIA, 1985)

Recognizing Address Blocks on Mail Pieces: Specialized Tools and Problem-Solving Architecture. - Sargur N. Srihari; Ching-Huei Wang; Paul W. Palumbo; Jonathan J. Hull (AI Mag., 1987)

Performance of a System to Locate Address Blocks on Mail Pieces. - Ching-Huei Wang; Paul W. Palumbo; Sargur N. Srihari (AAAI, 1988)

A blackboard-based approach to handwritten ZIP code recognition. - Jonathan J. Hull; Sargur N. Srihari; Edward Cohen; Leonard Kuan; Peter Cullen; Paul W. Palumbo (ICPR, 1988)

Object recognition in visually complex environments: an architecture for locating address blocks on mail pieces. - Ching-Huei Wang; Paul W. Palumbo; Sargur N. Srihari (ICPR, 1988)

Postal Address Block Location in Real Time. - Paul W. Palumbo; Sargur N. Srihari; Jung Soh; Ramalingam Sridhar; Victor Demjanenko (Computer, 1992)

A special-purpose content addressable memory chip for real-time image processing. - Yong-Chul Shin; Ramalingam Sridhar; Victor Demjanenko; Paul W. Palumbo; Sargur N. Srihari (IEEE J. Solid State Circuits, 1992)

Address block location using character recognition and address syntax. - Jenchyou Lii; Paul W. Palumbo; Sargur N. Srihari (ICDAR, 1993)

Postal address reading in real time. - Paul W. Palumbo; Sargur N. Srihari (Int. J. Imaging Syst. Technol., 1996)

Multi-attribute Lexicon Generation by Hyper-linked Embedded Access Structure. - Wen-jann Yang; Ramalingam Sridhar; Paul W. Palumbo (IDEAS, 1997)