Optimization of custom MOS circuits by transistor sizing. - Andrew R. Conn; Paula K. Coulman; Ruud A. Haring; Gregory L. Morrill; Chandramouli Visweswariah (ICCAD, 1996)

JiffyTune: circuit optimization using time-domain sensitivities. - Andrew R. Conn; Paula K. Coulman; Ruud A. Haring; Gregory L. Morrill; Chandramouli Visweswariah; Chai Wah Wu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998)

"Timing closure by design, " a high frequency microprocessor design methodology. - Stephen D. Posluszny; Naoaki Aoki; David Boerstler; Paula K. Coulman; Sang H. Dhong; Brian K. Flachs; H. Peter Hofstee; Nobuo Kojima; Ohsang Kwon; Kyung T. Lee; David Meltzer; Kevin J. Nowka; et al. (DAC, 2000)

Cell Broadband Engine Processor Design Methodology. - Osamu Takahashi; Erwin Behnen; Scott R. Cottier; Paula K. Coulman; Sang H. Dhong; Brian K. Flachs; H. Peter Hofstee; C. J. Johnson; Stephen D. Posluszny (CICC, 2007)

Migration of Cell Broadband Engine from 65nm SOI to 45nm SOI. - Osamu Takahashi; Chad Adams; D. Ault; Erwin Behnen; O. Chiang; Scott R. Cottier; Paula K. Coulman; James Culp; Gilles Gervais; M. S. Gray; Y. Itaka; C. J. Johnson; et al. (ISSCC, 2008)