Genetic Algorithm Based Training for Multilayer Discrete-Time Cellular Neural Networks. - Paula López 001; David López Vilariño; Diego Cabello (IWANN (2), 1999)

Design of multilayer discrete time cellular neural networks for image processing tasks based on genetic algorithms. - Paula López 001; David López Vilariño; Diego Cabello (ISCAS, 2000)

Antipersonnel mine detection on infrared images. - Paula López 001; Marco Balsi; David López Vilariño; Diego Cabello (ISTAS, 2000)

Robustness oriented design tool for multilayer DTCNN applications. - Paula López 001; David López Vilariño; Víctor M. Brea 001; Diego Cabello (Int. J. Circuit Theory Appl., 2002)

Improved thermal analysis of buried landmines. - Paula López Martinez 001; Luc Van Kempen; Hichem Sahli; Diego Cabello Ferrer (IEEE Trans. Geosci. Remote. Sens., 2004)

Practical considerations on doughnut transistors design. - Paula López 001; Matthias Oberst; Harald Neubauer; Johann Hauer; Diego Cabello (ECCTD, 2005)

FPGA Finite-Difference Time-Domain solver for thermal simulation. - Fernando Pardo; Paula López 001; Diego Cabello; Marco Balsi (FPL, 2005)

Performance analysis of high-speed MOS transistors with different layout styles. - Paula López 001; Matthias Oberst; Harald Neubauer; Johann Hauer; Diego Cabello (ISCAS (4), 2005)

FPGA Implementation of 3-D Thermal Model Simulator. - Fernando Pardo; Paula López 001; Diego Cabello; Marco Balsi (FPL, 2006)

Improved Analytical I-V model for polygonal-shape enclosed layout transistors. - Paula López 001; Diego Cabello; Hans Hauer (ECCTD, 2007)

Soft-Hard 3D FD-TD Solver for Non Destructive Evaluation. - Fernando Pardo; Paula López 001; Diego Cabello (FPL, 2007)

FPGA-based hardware accelerator of the heat equation with applications on infrared thermography. - Fernando Pardo; Paula López Martinez 001; Diego Cabello (ASAP, 2008)

A study of CMOS radiation tolerant transistors using green functions. - Paula López 001; Beatriz Blanco-Filgueira; Diego Cabello; Johann Hauer (ECCTD, 2009)

Efficient software-hardware 3D heat equation solver with applications on the non-destructive evaluation of minefields. - Fernando Pardo; Paula López 001; Diego Cabello; Marco Balsi (Comput. Geosci., 2009)

A dc I-V model for short-channel polygonal enclosed-layout transistors. - Paula López 001; Johann Hauer; Beatriz Blanco-Filgueira; Diego Cabello (Int. J. Circuit Theory Appl., 2009)

Analytical model for p-n junctions under point source illumination. - Beatriz Blanco-Filgueira; Paula López 001; Jens Döge (ICECS, 2010)

Modeling and experimental results of short channel annular MOS transistors. - Paula López 001; Beatriz Blanco-Filgueira; Johann Hauer (ECCTD, 2011)

Evidence of the lateral collection significance in small CMOS photodiodes. - Beatriz Blanco-Filgueira; Paula López 001; Jens Döge; Manuel Suarez; Juan Bautista Roldán (ISCAS, 2012)

A Verilog-AMS photodiode model including lateral effects. - Beatriz Blanco-Filgueira; Paula López 001; Juan Bautista Roldán (Microelectron. J., 2012)

CMOS photodiode model and HDL implementation. - Beatriz Blanco-Filgueira; Paula López 001; Manuel Suarez; Juan Bautista Roldán (ECCTD, 2013)

Voltage boosters for on-chip solar cells on focal-plane processors. - Víctor M. Brea 001; Manuel Suarez; J. Illade-Quinteiro; Paula López 001; Diego Cabello; Ginés Doménech-Asensi (ICECS, 2013)

Simplification and hardware implementation of the feature descriptor vector calculation in the SIFT algorithm. - Pablo Leyva; Ginés Doménech-Asensi; F. Javier Garrigós; Julio Illade-Quinteiro; Víctor M. Brea 001; Paula López 001; Diego Cabello (FPL, 2014)

Dark current optimization of 4-transistor pixel topologies in standard CMOS technologies for time-of-flight sensors. - J. Illade-Quinteiro; Víctor M. Brea 001; Paula López 001; Diego Cabello (ISCAS, 2015)

Capacitance-based wireless sensor mote for snail pest detection. - Daniel García-Lesta; Esteban Ferro; Víctor M. Brea 001; Paula López 001; Diego Cabello; Javier Iglesias; J. Castillejo (SAS, 2015)

Distance Measurement Error in Time-of-Flight Sensors Due to Shot Noise. - Julio Illade-Quinteiro; Víctor M. Brea 001; Paula López Martinez 001; Diego Cabello; Ginés Doménech-Asensi (Sensors, 2015)

Dynamic model of on-chip inverting capacitive charge pumps with charge reusing. - Esteban Ferro; Víctor M. Brea 001; Paula López 001; Diego Cabello (ISCAS, 2016)

Live demonstration: Wireless sensor network for snail pest detection. - Daniel García-Lesta; Esteban Ferro; Víctor M. Brea 001; Paula López 001; Diego Cabello; Javier Iglesias; J. Castillejo (ISCAS, 2016)

Time-of-flight chip in standard CMOS technology with in-pixel adaptive number of accumulations. - J. Illade-Quinteiro; Víctor M. Brea 001; Paula López 001; Diego Cabello (ISCAS, 2016)

Dynamic joint model of capacitive charge pumps and on-chip photovoltaic cells for CMOS micro-energy harvesting. - Esteban Ferro; Paula López 001; Víctor M. Brea 001; Diego Cabello (Int. J. Circuit Theory Appl., 2016)

Effect of temporal and spatial noise on the performance of hardware oriented background extraction algorithms. - Daniel García-Lesta; Víctor M. Brea 001; Paula López 001; Diego Cabello (NEWCAS, 2017)

Live Demonstration: Deep Learning-Based Multiple Object Detection and Tracking on a Low-Power Embedded System. - Beatriz Blanco-Filgueira; Daniel García-Lesta; Mauro Fernández-Sanjurjo; Víctor Manuel Brea Sánchez; Paula López 001 (ICDSC, 2018)

Results of 'iCaveats', a Project on the Integration of Architectures and Components for Embedded Vision. - Ricardo Carmona-Galán; Jorge Fernández-Berni; Ángel Rodríguez-Vázquez; Paula López Martinez 001; Víctor Manuel Brea Sánchez; Diego Cabello Ferrer; Ginés Doménech-Asensi; Ramón Ruiz Merino; Juan Zapata-Pérez (ICDSC, 2018)

Live Demonstration: Light Energy Harvesting System with an On-Chip Solar Cell and Cold Start-Up. - Esteban Ferro; Víctor M. Brea 001; Paula López 001; Diego Cabello (ISCAS, 2018)

Shannon Entropy as Background Dynamics Estimator In Foreground Detector Algorithms. - Daniel García-Lesta; Víctor M. Brea 001; Paula López 001; Diego Cabello (ISCAS, 2018)

Impact of Analog Memories Non-Idealities on the Performance of Foreground Detection Algorithms. - Daniel García-Lesta; Víctor M. Brea 001; Paula López 001; Diego Cabello (ISCAS, 2018)

Low-Power Regulator for Micro Energy Harvesting Applications. - Tapani Nevalainen; Esteban Ferro; Víctor M. Brea 001; Paula López 001; Ari Paasio (NORCAS, 2018)

In-pixel analog memories for a pixel-based background subtraction algorithm on CMOS vision sensors. - Daniel García-Lesta; Paula López 001; Víctor Manuel Brea Sánchez; Diego Cabello (Int. J. Circuit Theory Appl., 2018)

Pulsed time-of-flight pixel with on-chip 20 klux background light suppression in standard CMOS technology. - Julio Illade-Quinteiro; Paula López 001; Víctor M. Brea 001; Diego Cabello (Int. J. Circuit Theory Appl., 2018)

Design methodology of a 0.7 V, 64.5 pW @ 36°C, 1830μm2 Subthreshold Voltage Reference for Implantable Devices. - Óscar Pereira-Rial; Juan M. Carrillo; Paula López 001; Víctor M. Brea 001; Diego Cabello (ICECS, 2019)

Live Demonstration: Deep Learning-Based Visual Tracking of Multiple Objects on a Low-Power Embedded System. - Beatriz Blanco-Filgueira; Daniel García-Lesta; Mauro Fernández-Sanjurjo; Víctor M. Brea 001; Paula López 001 (ISCAS, 2019)

On-Chip Solar Cell and PMU on the Same Substrate with Cold Start-Up from nW and 80 dB of Input Power Range for Biomedical Applications. - Esteban Ferro; Paula López 001; Víctor M. Brea 001; Diego Cabello (ISCAS, 2019)

Time-of-Flight Pixel with Homodyne Phase Demodulation in Standard CMOS Technology. - J. Illade-Quinteiro; Paula López 001; Víctor M. Brea 001; Diego Cabello (ISCAS, 2019)

Ultralow power voltage reference circuit for implantable devices in standard CMOS technology. - Óscar Pereira-Rial; Paula López 001; Juan M. Carrillo; Víctor M. Brea 001; Diego Cabello (Int. J. Circuit Theory Appl., 2019)

Deep Learning-Based Multiple Object Visual Tracking on Embedded System for IoT and Mobile Edge Computing Applications. - Beatriz Blanco-Filgueira; Daniel García-Lesta; Mauro Fernández-Sanjurjo; Víctor M. Brea 001; Paula López 001 (IEEE Internet Things J., 2019)

Compact CMOS Class-AB Output Stage With Robust Behavior Against PVT Variations. - Óscar Pereira-Rial; Paula López 001; Raquel Pérez-Aloe; Juan M. Carrillo; Juan Francisco Duque-Carrillo (ICECS, 2020)

Lessons Learned the Hard Way. - Tobi Delbruck; Ibrahim Abe M. Elfadel; Shahzad Muzaffar; Germain Haessig; Bo Wang 012; Amine Bermak; Rui Graca; Luis A. Camuñas-Mesa; Bathiya Senevirathna; Pamela Abshire; Bernabé Linares-Barranco; Saeed Afshar; et al. (ISCAS, 2020)

A CMOS Vision Sensor for Background Subtraction. - Daniel García-Lesta; Paula López 001; Víctor M. Brea 001; Diego Cabello (ISCAS, 2020)

1.88 nA Quiescent Current Capacitor-Less LDO with Adaptive Biasing Based on a SSF Absolute Voltage Difference Meter. - Óscar Pereira-Rial; Paula López 001; Juan M. Carrillo; Víctor M. Brea 001; Diego Cabello (ISCAS, 2020)

All-hardware SIFT implementation for real-time VGA images feature extraction. - Ginés Doménech-Asensi; Juan Zapata-Pérez; Ramón Ruiz Merino; José-Alejandro López Alcantud; José Ángel Díaz-Madrid; Víctor Manuel Brea Sánchez; Paula López 001 (J. Real Time Image Process., 2020)

On-Chip Solar Energy Harvester and PMU With Cold Start-Up and Regulated Output Voltage for Biomedical Applications. - Diego Cabello; Esteban Ferro; Óscar Pereira-Rial; Beatriz Martínez-Vázquez; Víctor M. Brea 001; Juan M. Carrillo; Paula López 001 (IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020)

Proposal of a Single-Shot Multi-Frame Multi-Frequency CMOS ToF Sensor. - Peyman F. Shahandashti; Paula López 001; Víctor M. Brea 001; Daniel García-Lesta; Miguel Heredia Conde (ICECS, 2021)

HDR 4T-APS Pixel for Event Generation by Frame Differencing. - Marko Jaklin; Daniel García-Lesta; Víctor M. Brea 001; Paula López 001 (MWSCAS, 2021)

A General-Purpose CMOS Vision Sensor with In-Pixel 5-bit Convolutional Layer Computation. - Daniel García-Lesta; Óscar Pereira-Rial; Víctor M. Brea 001; Paula López 001; Diego Cabello (ICECS 2022, 2022)

Low-Power Techniques on a CMOS Vision Sensor Chip for Event Generation by Frame Differencing with High Dynamic Range. - Marko Jaklin; Daniel García-Lesta; Víctor M. Brea 001; Paula López 001 (ICECS 2022, 2022)

Fast Time-Domain Super-Resolution for Single-Shot Multi- Path ToF Imaging. - Peyman F. Shahandashti; Paula López 001; Víctor M. Brea 001; Daniel García-Lesta; Miguel Heredia Conde (ICECS 2022, 2022)

Live Demonstration: VLC-enabled Passive 3D Time-of-Flight Imaging. - Faisal Ahmed; Miguel Heredia Conde; Paula López Martinez 001; Thomas Kerstein; Bernd Buxbaum (IEEE SENSORS, 2022)

Passive 3D Time-of-Flight Imaging leveraging VLC Infrastructure. - Faisal Ahmed; Miguel Heredia Conde; Paula López Martinez 001; Thomas Kerstein; Bernd Buxbaum (IEEE SENSORS, 2022)

HDC8192: A General Purpose Mixed-Signal CMOS Architecture for Massively Parallel Hyperdimensional Computing. - Daniel García-Lesta; Fernando Pardo; Óscar Pereira-Rial; Víctor M. Brea 001; Paula López 001 (ISCAS, 2022)

Design of a 5-bit Signed SRAM-based In-Memory Computing Cell for Deep Learning Models. - Óscar Pereira-Rial; Daniel García-Lesta; Víctor M. Brea 001; Paula López 001; Diego Cabello (ISCAS, 2022)

A 2-Tap Macro-Pixel-Based Indirect ToF CMOS Image Sensor for Multi-Frequency Demodulation. - Peyman F. Shahandashti; Paula López 001; Víctor M. Brea 001; Daniel García-Lesta; Miguel Heredia Conde (ISCAS, 2022)

Low-cost mobile mapping system solution for traffic sign segmentation using Azure Kinect. - Zhouyan Qiu; Joaquín Martínez-Sánchez; Víctor M. Brea 001; Paula López 001; Pedro Arias (Int. J. Appl. Earth Obs. Geoinformation, 2022)

0.6-V-VIN 7.0-nA-IQ 0.75-mA-IL CMOS Capacitor-Less LDO for Low-Voltage Micro-Energy-Harvested Supplies. - Óscar Pereira-Rial; Paula López 001; Juan M. Carrillo (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

An 11 mA Capacitor-Less LDO With 3.08 nA Quiescent Current and SSF-Based Adaptive Biasing. - Óscar Pereira-Rial; Paula López 001; Juan M. Carrillo; Víctor M. Brea 001; Diego Cabello (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

Recent Advances in Computational Time-of-Flight Imaging. - Miguel Heredia Conde; Alvaro Lopez Paredes; Faisal Ahmed; Peyman F. Shahandashti; Paula López 001 (ACSSC, 2023)

GIPS: Geometry-Inspired Passive ToF Sensing for 3D Depth Reconstruction. - Faisal Ahmed; Miguel Heredia Conde; Paula López Martinez 001 (EUSIPCO, 2023)

CDS Free Frame Differencing Event Vision Pixel with Lateral Overflow Capacitor for Dynamic Range Extension. - Marko Jaklin; Daniel García-Lesta; Paula López 001; Víctor M. Brea 001 (ICECS, 2023)

Maximum Output Power Point Tracking for Low Power Photovoltaic Energy Harvesting Systems. - Laura Vicente-García; Óscar Pereira-Rial; Paula López 001 (SMACD, 2023)

Ultra-Low-Power Low-Input-Voltage Charge Pump for Micro-Energy Harvesting Applications. - Óscar Pereira-Rial; Alessandro Cabrini; Guido Torelli; Paula López 001; Juan M. Carrillo (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

Live Demonstration: A Mixed-Mode Signal CMOS Chip for Hyperdimensional Computing. - Daniel García-Lesta; Fernando Pardo; Óscar Pereira-Rial; Víctor M. Brea 001; Paula López 001; Diego Cabello (ISCAS, 2024)

Live Demonstration: 5-bit signed SRAM-based DNN CIM for Image Recognition. - Óscar Pereira-Rial; Daniel García-Lesta; Lorenzo Vaquero; Paula López 001; Víctor M. Brea 001; Diego Cabello (ISCAS, 2024)

Simultaneous Multifrequency Demodulation for Single-Shot Multiple-Path ToF Imaging. - Peyman F. Shahandashti; Paula López 001; Víctor M. Brea 001; Daniel García-Lesta; Miguel Heredia Conde (IEEE Trans. Computational Imaging, 2024)

Global shutter CMOS vision sensors and event cameras for on-chip dynamic information. - Marko Jaklin; Daniel García-Lesta; Paula López 001; Víctor M. Brea 001 (Int. J. Circuit Theory Appl., 2024)

Low-Voltage CMOS Capacitor-Less LDOs: Bulk-Driven Versus Gate-Driven Comparative Study. - Óscar Pereira-Rial; Juan M. Carrillo; Paula López 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)