Design of a low latency spectrum analyzer using the Goertzel Algorithm with a Network on Chip. - Laurent Jojczyk; Paulo Da Cunha Possa; Carlos Valderrama 001 (ICECS, 2010)

Convergence in reconfigurable embedded systems. - Carlos Valderrama 001; Laurent Jojczyk; Paulo Da Cunha Possa (ICECS, 2010)

Image and video processing on FPGAs: An exploration framework for real-time applications. - Paulo Da Cunha Possa; Zied El Hadhri; Carlos Valderrama 001 (PDeS, 2010)

FPGA-based hardware acceleration: A CPU/accelerator interface exploration. - Paulo Da Cunha Possa; David Schaillie; Carlos Valderrama 001 (ICECS, 2011)

A new self-adapting architecture for feature detection. - Paulo Da Cunha Possa; Sidi Ahmed Mahmoudi; Naim Harb; Carlos Valderrama 001 (FPL, 2012)

P2IP: A novel low-latency Programmable Pipeline Image Processor. - Paulo Da Cunha Possa; Naim Harb; Eva Dokládalová; Carlos Valderrama 001 (Microprocess. Microsystems, 2015)

LP-P2IP: A Low-Power Version of P1IP Architecture Using Partial Reconfiguration. - Álvaro Avelino; Valentin Obac Roda; Naim Harb; Carlos Valderrama 001; Glauberto Albuquerque; Paulo Da Cunha Possa (ARC, 2017)