Variability aware modeling of SoCs: From device variations to manufactured system yield. - Miguel Miranda; Bart Dierickx; Paul Zuber; Petr Dobrovolný; F. Kutscherauer; Philippe Roussel; Pavel Poliakov (ISQED, 2009)

Circuit Design for Bias Compatibility in Novel FinFET-Based Floating-Body RAM. - Pavel Poliakov; Ankur Anchlia; Marie Garcia Bardon; Bram Rooseleer; Bart De Wachter; Nadine Collaert; Koen van der Zanden; Wim Dehaene; Diederik Verkest; Miguel Corbalan Miranda (IEEE Trans. Circuits Syst. II Express Briefs, 2010)

Cross-cell interference variability aware model of fully planar NAND Flash memory including line edge roughness. - Pavel Poliakov; Pieter Blomme; Miguel Corbalan; Jan Van Houdt; Wim Dehaene (Microelectron. Reliab., 2011)

Trades-off between lithography line edge roughness and error-correcting codes requirements for NAND Flash memories. - Pavel Poliakov; Pieter Blomme; Alessandro Vaglio Pret; Miguel Corbalan Miranda; Roel Gronheid; Diederik Verkest; Jan Van Houdt; Wim Dehaene (Microelectron. Reliab., 2012)