Spin wave functions nanofabric update. - Prasad Shabadi; Alexander Khitun; Kin Wong; P. Khalili Amiri; Kang L. Wang; Csaba Andras Moritz (NANOARCH, 2011)

Spin wave nanofabric update. - J. G. Alzate; Parag Upadhyaya; M. Lewis; J. Nath; Y. T. Lin; Kin Wong; S. Cherepov; P. Khalili Amiri; Kang L. Wang; J. Hockel; A. Bur; Gregory P. Carman; et al. (NANOARCH, 2012)

MTJ variation monitor-assisted adaptive MRAM write. - Shaodi Wang; Hochul Lee; Cecile Grezes; Pedram Khalili; Kang L. Wang; Puneet Gupta 001 (DAC, 2016)

Ultra-low-power, high-density spintronic programmable logic (SPL). - Kang L. Wang; Hochul Lee; Farbod Ebrahimi; Pedram Khalili Amiri (ISCAS, 2016)

4.7 A 65nm ReRAM-enabled nonvolatile processor with 6× reduction in restore time and 4× higher clock frequency using adaptive data retention and self-write-termination nonvolatile logic. - Yongpan Liu; Zhibo Wang 004; Albert Lee; Fang Su; Chieh-Pu Lo; Zhe Yuan; Chien-Chen Lin; Qi Wei 001; Yu Wang 002; Ya-Chin King; Chrong Jung Lin; Pedram Khalili; et al. (ISSCC, 2016)

Comparative Evaluation of Spin-Transfer-Torque and Magnetoelectric Random Access Memory. - Shaodi Wang; Hochul Lee; Farbod Ebrahimi; P. Khalili Amiri; Kang L. Wang; Puneet Gupta 001 (IEEE J. Emerg. Sel. Topics Circuits Syst., 2016)

Electric-Field Control of Spin-Orbit Interaction for Low-Power Spintronics. - Kang L. Wang; Xufeng Kou; Pramey Upadhyaya; Yabin Fan; Qiming Shao; Guoqiang Yu; Pedram Khalili Amiri (Proc. IEEE, 2016)

Hybrid VC-MTJ/CMOS non-volatile stochastic logic for efficient computing. - Shaodi Wang; Saptadeep Pal; Tianmu Li; Andrew Pan; Cecile Grezes; Pedram Khalili Amiri; Kang L. Wang; Puneet Gupta 001 (DATE, 2017)

A ReRAM-Based Nonvolatile Flip-Flop With Self-Write-Termination Scheme for Frequent-OFF Fast-Wake-Up Nonvolatile Processors. - Albert Lee; Chieh-Pu Lo; Chien-Chen Lin; Wei-Hao Chen; Kuo-Hsiang Hsu; Zhibo Wang 004; Fang Su; Zhe Yuan; Qi Wei 001; Ya-Chin King; Chrong Jung Lin; Hochul Lee; et al. (IEEE J. Solid State Circuits, 2017)

A 65-nm ReRAM-Enabled Nonvolatile Processor With Time-Space Domain Adaption and Self-Write-Termination Achieving > 4× Faster Clock Frequency and > 6× Higher Restore Speed. - Zhibo Wang 004; Yongpan Liu; Albert Lee; Fang Su; Chieh-Pu Lo; Zhe Yuan; Jinyang Li 002; Chien-Chen Lin; Wei-Hao Chen; Hsiao-Yun Chiu; Wei-En Lin; Ya-Chin King; et al. (IEEE J. Solid State Circuits, 2017)

A Word Line Pulse Circuit Technique for Reliable Magnetoelectric Random Access Memory. - Hochul Lee; Albert Lee; Shaodi Wang; Farbod Ebrahimi; Puneet Gupta 001; Pedram Khalili Amiri; Kang L. Wang (IEEE Trans. Very Large Scale Integr. Syst., 2017)

A Dual-Data Line Read Scheme for High-Speed Low-Energy Resistive Nonvolatile Memories. - Albert Lee; Hochul Lee; Farbod Ebrahimi; Bonnie Lam; Wei-Hao Chen; Meng-Fan Chang; Pedram Khalili Amiri; Kang-Lung Wang (IEEE Trans. Very Large Scale Integr. Syst., 2018)

Fast and programmable locomotion of hydrogel-metal hybrids under light and magnetic fields. - Chuang Li; Garrett C. Lau; Hang Yuan; Aaveg Aggarwal; Victor Lopez Dominguez; Shuangping Liu; Hiroaki Sai; Liam C. Palmer; Nicholas A. Sather; Tyler J. Pearson; Danna E. Freedman; Pedram Khalili Amiri; et al. (Sci. Robotics, 2020)

Adaptive MRAM Write and Read with MTJ Variation Monitor. - Shaodi Wang; Hochul Lee; Cecile Grezes; Pedram Khalili Amiri; Kang L. Wang; Puneet Gupta 001 (IEEE Trans. Emerg. Top. Comput., 2021)

Voltage-Controlled Magnetic Tunnel Junction based ADC-less Global Shutter Processing-in-Pixel for Extreme-Edge Intelligence. - Md. Abdullah-Al Kaiser; Gourav Datta; Jordan Athas; Christian Duffee; Ajey P. Jacob; Pedram Khalili Amiri; Peter A. Beerel; Akhilesh R. Jaiswal (CoRR, 2024)

Toggle SOT-MRAM Architecture With Self-Terminating Write Operation. - Ebenezer C. Usih; Naimul Hassan; Alexander J. Edwards; Felipe García-Sánchez; Pedram Khalili Amiri; Joseph S. Friedman (IEEE Trans. Very Large Scale Integr. Syst., 2025)