A Single-Channel 18.5 GS/s 5-bit Flash ADC using a Body-Biased Comparator Architecture in 22nm FD-SOI. - Nima Lotfi; Pedro Lehmann Ibáñez; Marcel Runge; Friedel Gerfers (ISCAS, 2019)

From CCS-Planning to Testautomation: The Digital Testfield of Deutsche Bahn in Scheibenberg - A Case Study. - Arne Boockmeyer; Dirk Friedenberger; Lukas Pirl; Robert Schmid; Andreas Polze; Heiko Herholz; Gisela Freiin von Arnim; Pedro Lehmann Ibáñez; Torsten Friedrich; Christoph Klaus; Christian Wilhelmi (IC2E, 2021)