Hardware/software partitioning and minimizing memory interface traffic. - Axel Jantsch; Peeter Ellervee; Ahmed Hemani; Johnny Öberg; Hannu Tenhunen (EURO-DAC, 1994)

A Rule-Based Approach for Improving Allocation of Filter Structures in HLS. - Johnny Öberg; Jouni Isoaho; Peeter Ellervee; Axel Jantsch; Ahmed Hemani (VLSI Design, 1996)

A Novell Allocation Strategy for Control and Memory Intensive Telecommunication Circiuts. - Bengt Svantesson; Ahmed Hemani; Peeter Ellervee; Adam Postula; Johnny Öberg; Axel Jantsch; Hannu Tenhunen (VLSI Design, 1996)

Revolver: A High-Performance MIMD Architecture for Collision Free Computing. - Johnny Öberg; Peeter Ellervee (EUROMICRO, 1998)

Lowering Power Consumption in Clock by Using Globally Asynchronous Locally Synchronous Design Style. - Ahmed Hemani; Thomas Meincke; Shashi Kumar; Adam Postula; Thomas Olsson 001; Peter Nilsson 001; Johnny Öberg; Peeter Ellervee; Dan Lundqvist (DAC, 1999)

Exploiting Data Transfer Locality in Memory Mapping. - Peeter Ellervee; Ahmed Hemani; Miguel Miranda; Francky Catthoor (EUROMICRO, 1999)

Globally asynchronous locally synchronous architecture for large high-performance ASICs. - Thomas Meincke; Ahmed Hemani; Shashi Kumar; Peeter Ellervee; Johnny Öberg; Thomas Olsson 001; Peter Nilsson 001; Dan Lindqvist; Hannu Tenhunen (ISCAS (2), 1999)

System-level data format exploration for dynamically allocated data structures. - Peeter Ellervee; Miguel Miranda; Francky Catthoor; Ahmed Hemani (DAC, 2000)

TOP: An Algorithm for Three-Level Optimization of PLDs. - Elena Dubrova; Peeter Ellervee; D. Michael Miller; Jon C. Muzio (DATE, 2000)

Digital Hardware Organization Course for SoC Program. - Peeter Ellervee; Hannu Tenhunen (MSE, 2001)

System-level data-format exploration for dynamically allocated datastructures. - Peeter Ellervee; Miguel Miranda; Francky Catthoor; Ahmed Hemani (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001)

System Level Power-Performance Trade-Offs in Embedded Systems Using Voltage and Frequency Scaling of Off-Chip Buses and Memory. - Abhijit Chatterjee; Peeter Ellervee; Vincent John Mooney III; Jun-Cheol Park; Kyu-won Choi; Kiran Puttaswamy (ISSS, 2002)

Evaluating Fault Emulation on FPGA. - Peeter Ellervee; Jaan Raik; Valentin Tihhomirov; Kalle Tammemäe (FPL, 2004)

Improved Fault Emulation for Synchronous Sequential Circuits. - Jaan Raik; Peeter Ellervee; Valentin Tihhomirov; Raimund Ubar (DSD, 2005)

Work in Progress: FPGA Based Emulation Environment. - Gert Jervan; Anton Arhipov; Peeter Ellervee (ReCoSoC, 2006)

HDL-s for Students with Different Background. - Uljana Reinsalu; Anton Arhipov; Teet Evartson; Peeter Ellervee (MSE, 2007)

FPGA-based fault emulation of synchronous sequential circuits. - Peeter Ellervee; Jaan Raik; Kalle Tammemäe; Raimund Ubar (IET Comput. Digit. Tech., 2007)

Code Coverage Analysis using High-Level Decision Diagrams. - Jaan Raik; Uljana Reinsalu; Raimund Ubar; Maksim Jenihhin; Peeter Ellervee (DDECS, 2008)

Hierarchical Calculation of Malicious Faults for Evaluating the Fault-Tolerance. - Raimund Ubar; Sergei Devadze; Maksim Jenihhin; Jaan Raik; Gert Jervan; Peeter Ellervee (DELTA, 2008)

Scheduling framework for real-time dependable NoC-based systems. - Mihkel Tagel; Peeter Ellervee; Gert Jervan (SoC, 2009)

Guest Editorial. - Peeter Ellervee; Gert Jervan (Microprocess. Microsystems, 2010)

Communication modelling and synthesis for NoC-based systems with real-time constraints. - Mihkel Tagel; Peeter Ellervee; Thorsten Hollstein; Gert Jervan (DDECS, 2011)

Fast RTL Fault Simulation Using Decision Diagrams and Bitwise Set Operations. - Uljana Reinsalu; Jaan Raik; Raimund Ubar; Peeter Ellervee (DFT, 2011)

EEG Analyzer prototype based on FPGA. - Maksim Jenihhin; Maksim Gorev; Vadim Pesonen; Dmitri Mihhailov; Peeter Ellervee; Hiie Hinrikus; Maie Bachmann; Jaanus Lass (ISPA, 2011)

Experience in increase of practical hours for HDL course. - Uljana Reinsalu; Peeter Ellervee (MSE, 2011)

Contention aware scheduling for NoC-based real-time systems. - Mihkel Tagel; Peeter Ellervee; Thomas Hollstein; Gert Jervan (NORCHIP, 2011)

Multisine signal generation method for a bioimpedance measurement device. - Maksim Gorev; Vadim Pesonen; Peeter Ellervee (DDECS, 2012)

At-speed self-testing of high-performance pipe-lined processing architectures. - Maksim Gorev; Raimund Ubar; Peeter Ellervee; Sergei Devadze; Jaan Raik; Mart Min (NORCHIP, 2013)

Guest Editorial. - Peeter Ellervee; Jari Nurmi (Microprocess. Microsystems, 2013)

Morphable Compression Architecture for Efficient Configuration in CGRAs. - Syed Mohammad Asad Hassan Jafri; Muhammad Adeel Tajammul; Masoud Daneshtalab; Ahmed Hemani; Kolin Paul; Peeter Ellervee; Juha Plosila; Hannu Tenhunen (DSD, 2014)

Hardware close programming for freshmen. - Helena Kruus; Marina Brik; Margus Kruus; Priit Ruberg; Vladimir Viies; Peeter Ellervee (EWME, 2014)

Customizable Compression Architecture for Efficient Configuration in CGRAs. - Syed M. A. H. Jafri; Muhammad Adeel Tajammul; Masoud Daneshtalab; Ahmed Hemani; Kolin Paul; Peeter Ellervee; Juha Plosila; Hannu Tenhunen (FCCM, 2014)

Optimization of multisine excitation for a bioimpedance measurement device. - Jaan Ojarand; Paul Annus; Mart Min; Maksim Gorev; Peeter Ellervee (I2MTC, 2014)

An ad-hoc implementation of a remote laboratory. - Siavoosh Payandeh Azad; Hannes Kinks; Muhammad Adeel Tajammul; Peeter Ellervee (MSE, 2015)

Flexible controller for educational robot kit. - Priit Ruberg; Aivar Guitar; Peeter Ellervee (MSE, 2015)

Digital system modeling and synthesis as an introduction to Computer Systems Engineering. - Muhammad Adeel Tajammul; Siavoosh Payandeh Azad; Peeter Ellervee (MSE, 2015)

Microcontroller energy consumption estimation based on software analysis for embedded systems. - Priit Ruberg; Keijo Lass; Peeter Ellervee (NORCAS, 2015)

DyMeP: An Infrastructure to Support Dynamic Memory Binding for Runtime Mapping in CGRAs. - Muhammad Adeel Tajammul; Syed M. A. H. Jafri; Peeter Ellervee; Ahmed Hemani; Hannu Tenhunen; Juha Plosila (VLSID, 2015)

Functional self-test of high-performance pipe-lined signal processing architectures. - Maksim Gorev; Raimund Ubar; Peeter Ellervee; Sergei Devadze; Jaan Raik; Mart Min (Microprocess. Microsystems, 2015)

Data type dependent energy consumption estimation. - Priit Ruberg; Keijo Lass; Peeter Ellervee (NORCAS, 2016)

TransMem: A memory architecture to support dynamic remapping and parallelism in low power high performance CGRAs. - Muhammad Adeel Tajammul; Syed M. A. H. Jafri; Ahmed Hemani; Peeter Ellervee (PATMOS, 2016)

SoCDep2: A framework for dependable task deployment on many-core systems under mixed-criticality constraints. - Siavoosh Payandeh Azad; Behrad Niazmand; Peeter Ellervee; Jaan Raik; Gert Jervan; Thomas Hollstein (ReCoSoC, 2016)

Polymorphic Configuration Architecture for CGRAs. - Syed Mohammad Asad Hassan Jafri; Muhammad Adeel Tajammul; Ahmed Hemani; Kolin Paul; Juha Plosila; Peeter Ellervee; Hannu Tenhunen (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Standards-based tools and services for building lifelong learning pathways. - Cleo Sgouropoulou; Ioannis Voyiatzis; Anastasios Koutoumanos; Said Hamdioui; Peyman Pouyan; M. Comte; Paolo Prinetto; Giuseppe Airo Farulla; Peeter Ellervee; Carlos Delgado Kloos; Raquel M. Crespo García (EDUCON, 2017)

Performance estimation of embedded applications on microcontrollers. - Priit Ruberg; Keijo Lass; Elvar Liiv; Peeter Ellervee (NORCAS, 2017)

Guest Editorial: Implementation Issues in System-on-Chip. - Peeter Ellervee; Jari Nurmi (J. Signal Process. Syst., 2017)

SCAAT: Secure Cache Alternative Address Table for mitigating cache logical side-channel attacks. - Ameer Shalabi; Tara Ghasempouri; Peeter Ellervee; Jaan Raik (DSD, 2020)

Wafer-Level Die Re-Test Success Prediction Using Machine Learning. - Hardi Selg; Maksim Jenihhin; Peeter Ellervee (LATS, 2020)

CLD: An Accurate, Cost-Effective and Scalable Run-Time Cache Leakage Detector. - Ameer Shalabi; Tara Ghasempouri; Peeter Ellervee; Jaan Raik (DDECS, 2021)

JÄNES: A NAS Framework for ML-based EDA Applications. - Hardi Selg; Maksim Jenihhin; Peeter Ellervee (DFT, 2021)

Surviving the Unforeseen - Teaching IT and Engineering Students During COVID-19 Outbreak. - Priit Ruberg; Peeter Ellervee; Kalle Tammemäe; Uljana Reinsalu; Andres Rähni; Tarmo Robal (FIE, 2022)

ML-Based Online Design Error Localization for RISC-V Implementations. - Hardi Selg; Maksim Jenihhin; Peeter Ellervee; Jaan Raik (IOLTS, 2023)

Special Session: In-Field ML-Assisted Intermittent Fault Localization and Management in RISC-V SoCs. - Hardi Selg; Konstantin Shibin; Anton Tsertov; Maksim Jenihhin; Peeter Ellervee; Jaan Raik (DFT, 2024)

Exploring the Real-World Challenges and Efficacy of Internal Coupling in Metastructures: An Experimental Perspective. - Hossein Alimohammadi; Kristina Vassiljeva; S. Hassan HosseinNia; Peeter Ellervee; Eduard Petlenkov (ICECET, 2024)

Architectural Solutions for High-Speed Data Processing Demands of CERN LHC Detectors with FPGA and High-Level Synthesis. - Sergei Devadze; Christine Elizabeth Nielsen; Dmitri Mihhailov; Peeter Ellervee (NorCAS, 2024)