Low power design of phase-change memory based on a comprehensive model. - Meng-Hsueh Chiang; Yi-Bo Liao; Jun-Tin Lin; Wei-Chou Hsu; Chu Yu; Pei-Chia Chiang; Y.-Y. Hsu; W.-H. Liu; Shyh-Shyuan Sheu; Keng-Li Su; Ming-Jer Kao; Ming-Jinn Tsai (IET Comput. Digit. Tech., 2010)

A 4Mb embedded SLC resistive-RAM macro with 7.2ns read-write random-access time and 160ns MLC-access capability. - Shyh-Shyuan Sheu; Meng-Fan Chang; Ku-Feng Lin; Che-Wei Wu; Yu-Sheng Chen; Pi-Feng Chiu; Chia-Chen Kuo; Yih-Shan Yang; Pei-Chia Chiang; Wen-Pin Lin; Che-He Lin; Heng-Yuan Lee; et al. (ISSCC, 2011)

Fast-Write Resistive RAM (RRAM) for Embedded Applications. - Shyh-Shyuan Sheu; Kuo-Hsing Cheng; Meng-Fan Chang; Pei-Chia Chiang; Wen-Pin Lin; Heng-Yuan Lee; Pang-Shiu Chen; Yu-Sheng Chen; Frederick T. Chen; Ming-Jinn Tsai (IEEE Des. Test Comput., 2011)