A nonvolatile look-up table using ReRAM for reconfigurable logic. - Wen-Pin Lin; Shyh-Shyuan Sheu; Chia-Chen Kuo; Pei-Ling Tseng; Meng-Fan Chang; Keng-Li Su; Chih-Sheng Lin; Kan-Hsueh Tsai; Sih-Han Lee; Szu-Chieh Liu; Yu-Sheng Chen; Heng-Yuan Lee; et al. (A-SSCC, 2014)

Read circuits for resistive memory (ReRAM) and memristor-based nonvolatile Logics. - Meng-Fan Chang; Albert Lee; Chien-Chen Lin; Mon-Shu Ho; Ping-Cheng Chen; Chia-Chen Kuo; Ming-Pin Chen; Pei-Ling Tseng; Tzu-Kun Ku; Chien-Fu Chen; Kai-Shin Li; Jia-Min Shieh (ASP-DAC, 2015)

Self-adjustable feed-forward control and auto-tracking off-time control techniques for 95% accuracy and 95% efficiency AC-DC non-isolated LED driver. - Hsin Chen; Chi-Wei Chen; Hsueh-Yi Hsieh; Ke-Horng Chen; Tsung-Yen Tsai; Jian-Ru Lin; Ying-Hsi Lin; Chao-Cheng Lee; Pei-Ling Tseng (ISCAS, 2015)

99% High accuracy knee voltage detection for primary-side control in flyback converter. - Tsung-Hsun Tsai; Ke-Horng Chen; Tsung-Yen Tsai; Jian-Ru Lin; Ying-Hsi Lin; Chao-Cheng Lee; Pei-Ling Tseng (ISCAS, 2015)

Implantable biomedical device supplying by a 28nm CMOS self-calibration DC-DC buck converter with 97% output voltage accuracy. - Te-Fu Yang; Ru-Yu Huang; Yi-Ping Su; Balakumar; Ke-Horng Chen; Tsung-Yen Tsai; Jian-Ru Lin; Ying-Hsi Lin; Chao-Cheng Lee; Pei-Ling Tseng (ISCAS, 2015)

17.5 A 3T1R nonvolatile TCAM using MLC ReRAM with Sub-1ns search time. - Meng-Fan Chang; Chien-Chen Lin; Albert Lee; Chia-Chen Kuo; Geng-Hau Yang; Hsiang-Jen Tsai; Tien-Fu Chen; Shyh-Shyuan Sheu; Pei-Ling Tseng; Heng-Yuan Lee; Tzu-Kun Ku (ISSCC, 2015)

RRAM-based 7T1R nonvolatile SRAM with 2x reduction in store energy and 94x reduction in restore energy for frequent-off instant-on applications. - Albert Lee; Meng-Fan Chang; Chien-Chen Lin; Chien-Fu Chen; Mon-Shu Ho; Chia-Chen Kuo; Pei-Ling Tseng; Shyh-Shyuan Sheu; Tzu-Kun Ku (VLSIC, 2015)

Set-Triggered-Parallel-Reset Memristor Logic for High-Density Heterogeneous-Integration Friendly Normally Off Applications. - Meng-Fan Chang; Shu-Meng Yang; Chia-Chen Kuo; Ting-Chin Yang; Che-Ju Yeh; Tun-Fei Chien; Li-Yue Huang; Shyh-Shyuan Sheu; Pei-Ling Tseng; Yu-Sheng Chen; Frederick T. Chen; Tzu-Kun Ku; et al. (IEEE Trans. Circuits Syst. II Express Briefs, 2015)

Logic Process Compatible 40nm 256K×144 Embedded RRAM with Low Voltage Current Limiter and Ambient Compensation Scheme to Improve the Read Window. - Chien-An Lai; Chung-Cheng Chou; Chi-Hsiang Weng; Zheng-Jun Lin; Pei-Ling Tseng; Chien-Fan Wang; Chih-Chen Wang; Chin-I Su; Wei-Chi Chen; Yu-Cheng Lin; Tong-Chern Ong; Chi Chang; et al. (A-SSCC, 2018)

An N40 256K×44 embedded RRAM macro with SL-precharge SA and low-voltage current limiter to improve read and write performance. - Chung-Cheng Chou; Zheng-Jun Lin; Pei-Ling Tseng; Chih-Feng Li; Chih-Yang Chang; Wei-Chi Chen; Yu-Der Chih; Tsung-Yung Jonathan Chang (ISSCC, 2018)

A 22nm 96KX144 RRAM Macro with a Self-Tracking Reference and a Low Ripple Charge Pump to Achieve a Configurable Read Window and a Wide Operating Voltage Range. - Chung-Cheng Chou; Zheng-Jun Lin; Chien-An Lai; Chin-I Su; Pei-Ling Tseng; Wei-Chi Chen; Wu-Chin Tsai; Wen-Ting Chu; Tong-Chern Ong; Harry Chuang; Yu-Der Chih; Tsung-Yung Jonathan Chang (VLSI Circuits, 2020)