A Fully Pipelined and Dynamically Composable Architecture of CGRA. - Jason Cong; Hui Huang 001; Chiyuan Ma; Bingjun Xiao; Peipei Zhou 001 (FCCM, 2014)

Energy Efficiency of Full Pipelining: A Case Study for Matrix Multiplication. - Peipei Zhou 001; Hyunseok Park; Zhenman Fang; Jason Cong; André DeHon (FCCM, 2016)

ARAPrototyper: Enabling Rapid Prototyping and Evaluation for Accelerator-Rich Architecture (Abstact Only). - Yu-Ting Chen 003; Jason Cong; Zhenman Fang; Peipei Zhou 001 (FPGA, 2016)

Caffeine: towards uniformed representation and acceleration for deep convolutional neural networks. - Chen Zhang 001; Zhenman Fang; Peipei Zhou 001; Peichen Pan; Jason Cong (ICCAD, 2016)

ARAPrototyper: Enabling Rapid Prototyping and Evaluation for Accelerator-Rich Architectures. - Yu-Ting Chen 003; Jason Cong; Zhenman Fang; Bingjun Xiao; Peipei Zhou 001 (CoRR, 2016)

Bandwidth Optimization Through On-Chip Memory Restructuring for HLS. - Jason Cong; Peng Wei 004; Cody Hao Yu; Peipei Zhou 001 (DAC, 2017)

Latte: Locality Aware Transformation for High-Level Synthesis. - Jason Cong; Peng Wei 004; Cody Hao Yu; Peipei Zhou 001 (FCCM, 2018)

ST-Accel: A High-Level Programming Platform for Streaming Applications on FPGA. - Zhenyuan Ruan; Tong He; Bojie Li; Peipei Zhou 001; Jason Cong (FCCM, 2018)

An Optimal Microarchitecture for Stencil Computation with Data Reuse and Fine-Grained Parallelism: (Abstract Only). - Yuze Chi; Peipei Zhou 001; Jason Cong (FPGA, 2018)

SODA: stencil with optimized dataflow architecture. - Yuze Chi; Jason Cong; Peng Wei 004; Peipei Zhou 001 (ICCAD, 2018)

Doppio: I/O-Aware Performance Analysis, Modeling and Optimization for In-memory Computing Framework. - Peipei Zhou 001; Zhenyuan Ruan; Zhenman Fang; Megan Shand; David Roazen; Jason Cong (ISPASS, 2018)

Best-Effort FPGA Programming: A Few Steps Can Go a Long Way. - Jason Cong; Zhenman Fang; Yuchen Hao; Peng Wei 004; Cody Hao Yu; Chen Zhang 001; Peipei Zhou 001 (CoRR, 2018)

Caffeine: Toward Uniformed Representation and Acceleration for Deep Convolutional Neural Networks. - Chen Zhang 001; Guangyu Sun 003; Zhenman Fang; Peipei Zhou 001; Peichen Pan; Jason Cong (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

Modeling and Optimization for Customized Computing: Performance, Energy and Cost Perspective. - Peipei Zhou 001 (2019)

Algorithm-Hardware Co-design for BQSR Acceleration in Genome Analysis ToolKit. - Michael Lo; Zhenman Fang; Jie Wang 022; Peipei Zhou 001; Mau-Chung Frank Chang; Jason Cong (FCCM, 2020)

MOCHA: Multinode Cost Optimization in Heterogeneous Clouds with Accelerators. - Peipei Zhou 001; Jiayi Sheng; Cody Hao Yu; Peng Wei 004; Jie Wang 022; Di Wu 010; Jason Cong (FPGA, 2021)

Algorithm-hardware Co-design of Attention Mechanism on FPGA Devices. - Xinyi Zhang 001; Yawen Wu; Peipei Zhou 001; Xulong Tang; Jingtong Hu (ACM Trans. Embed. Comput. Syst., 2021)

H2H: heterogeneous model to heterogeneous system mapping with computation and communication awareness. - Xinyi Zhang 001; Cong Hao; Peipei Zhou 001; Alex K. Jones; Jingtong Hu (DAC, 2022)

Sustainable AI Processing at the Edge. - Sébastien Ollivier; Sheng Li 019; Yue Tang 002; Chayanika Chaudhuri; Peipei Zhou 001; Xulong Tang; Jingtong Hu; Alex K. Jones (CoRR, 2022)

Enabling Weakly Supervised Temporal Action Localization From On-Device Learning of the Video Stream. - Yue Tang 002; Yawen Wu; Peipei Zhou 001; Jingtong Hu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

EF-Train: Enable Efficient On-device CNN Training on FPGA through Data Reshaping for Online Adaptation or Personalization. - Yue Tang 002; Xinyi Zhang 001; Peipei Zhou 001; Jingtong Hu (ACM Trans. Design Autom. Electr. Syst., 2022)

Caffeine: Towards Uniformed Representation and Acceleration for Deep Convolutional Neural Networks. - Chen Zhang 001; Guangyu Sun 003; Zhenman Fang; Peipei Zhou 001; Jason Cong (ACM TUR-C, 2023)

High Performance, Low Power Matrix Multiply Design on ACAP: from Architecture, Design Challenges and DSE Perspectives. - Jinming Zhuang; Zhuoping Yang; Peipei Zhou 001 (DAC, 2023)

CHARM: Composing Heterogeneous AcceleRators for Matrix Multiply on Versal ACAP Architecture. - Jinming Zhuang; Jason Lau; Hanchen Ye; Zhuoping Yang; Yubo Du; Jack Lo; Kristof Denolf; Stephen Neuendorffer; Alex K. Jones; Jingtong Hu; Deming Chen; Jason Cong; et al. (FPGA, 2023)

AIM: Accelerating Arbitrary-Precision Integer Multiplication on Heterogeneous Reconfigurable Computing Platform Versal ACAP. - Zhuoping Yang; Jinming Zhuang; Jiaqi Yin; Cunxi Yu; Alex K. Jones; Peipei Zhou 001 (ICCAD, 2023)

REFRESH FPGAs: Sustainable FPGA Chiplet Architectures. - Peipei Zhou 001; Jinming Zhuang; Stephen Cahoon; Yue Tang 002; Zhuoping Yang; Xingzhen Chen; Yiyu Shi 001; Jingtong Hu; Alex K. Jones (IGSC, 2023)

AutoMM: Energy-Efficient Multi-Data-Type Matrix Multiply Design on Heterogeneous Programmable System-on-Chip. - Jinming Zhuang; Zhuoping Yang; Peipei Zhou 001 (CoRR, 2023)

Sustainable AI Processing at the Edge. - Sébastien Ollivier; Sheng Li 019; Yue Tang 002; Stephen Cahoon; Ryan Caginalp; Chayanika Chaudhuri; Peipei Zhou 001; Xulong Tang; Jingtong Hu; Alex K. Jones (IEEE Micro, 2023)

Challenges and Opportunities to Enable Large-Scale Computing via Heterogeneous Chiplets. - Zhuoping Yang; Shixin Ji; Xingzhen Chen; Jinming Zhuang; Weifeng Zhang; Dharmesh Jani; Peipei Zhou 001 (ASPDAC, 2024)

Reducing Smart Phone Environmental Footprints with In-Memory Processing. - Zhuoping Yang; Wei Zhang 062; Shixin Ji; Peipei Zhou 001; Alex K. Jones (CODES+ISSS, 2024)

Enabling On-Device Large Language Model Personalization with Self-Supervised Data Selection and Synthesis. - Ruiyang Qin; Jun Xia 003; Zhenge Jia; Meng Jiang 001; Ahmed Abbasi; Peipei Zhou 001; Jingtong Hu; Yiyu Shi 001 (DAC, 2024)

SSR: Spatial Sequential Hybrid Architecture for Latency Throughput Tradeoff in Transformer Acceleration. - Jinming Zhuang; Zhuoping Yang; Shixin Ji; Heng Huang; Alex K. Jones; Jingtong Hu; Yiyu Shi 001; Peipei Zhou 001 (FPGA, 2024)

Amortizing Embodied Carbon Across Generations. - Shixin Ji; Jinming Zhuang; Zhuoping Yang; Alex K. Jones; Peipei Zhou 001 (IGSC, 2024)

SCARIF: Towards Carbon Modeling of Cloud Servers with Accelerators. - Shixin Ji; Zhuoping Yang; Xingzhen Chen; Stephen Cahoon; Jingtong Hu; Yiyu Shi 001; Alex K. Jones; Peipei Zhou 001 (ISVLSI, 2024)

Towards Carbon Modeling of Cloud Servers with Accelerators. - Shixin Ji; Zhuoping Yang; Stephen Cahoon; Alex K. Jones; Peipei Zhou 001 (CoRR, 2024)

Towards Data-center Level Carbon Modeling and Optimization for Deep Learning Inference. - Shixin Ji; Zhuoping Yang; Xingzhen Chen; Jingtong Hu; Yiyu Shi 001; Alex K. Jones; Peipei Zhou 001 (CoRR, 2024)

Towards Error Correction for Computing in Racetrack Memory. - Preston Brazzle; Benjamin F. Morris III; Evan McKinney; Peipei Zhou 001; Jingtong Hu; Asif Ali Khan; Alex K. Jones (CoRR, 2024)

CHARM 2.0: Composing Heterogeneous Accelerators for Deep Learning on Versal ACAP Architecture. - Jinming Zhuang; Jason Lau; Hanchen Ye; Zhuoping Yang; Shixin Ji; Jack Lo; Kristof Denolf; Stephen Neuendorffer; Alex K. Jones; Jingtong Hu; Yiyu Shi 001; Deming Chen; et al. (ACM Trans. Reconfigurable Technol. Syst., 2024)

EQ-ViT: Algorithm-Hardware Co-Design for End-to-End Acceleration of Real-Time Vision Transformer Inference on Versal ACAP Architecture. - Peiyan Dong; Jinming Zhuang; Zhuoping Yang; Shixin Ji; Yanyu Li; Dongkuan Xu; Heng Huang; Jingtong Hu; Alex K. Jones; Yiyu Shi 001; Yanzhi Wang; Peipei Zhou 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

CHEF: A Framework for Deploying Heterogeneous Models on Clusters With Heterogeneous FPGAs. - Yue Tang 002; Yukai Song; Naveena Elango; Sheena Ratnam Priya; Alex K. Jones; Jinjun Xiong; Peipei Zhou 001; Jingtong Hu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

FiberFlex: Real-time FPGA-based Intelligent and Distributed Fiber Sensor System for Pedestrian Recognition. - Yuqi Li; Kehao Zhao; Jieru Zhao; Qirui Wang; Shuda Zhong; Nageswara Lalam; Ruishu F. Wright; Peipei Zhou 001; Kevin P. Chen (ACM Trans. Reconfigurable Technol. Syst., 2024)

Ph.D. Project AIM: Accelerating Arbitrary-Precision Integer Multiplication on Heterogeneous Reconfigurable Computing Platform Versal ACAP. - Zhuoping Yang; Peipei Zhou 001 (FCCM, 2025)

Ph.D. Project ARIES: Efficient Mapping and Automated Compilation for AMD Versal Devices. - Jinming Zhuang; Peipei Zhou 001 (FCCM, 2025)

Towards Accelerator Customization in Real-time Safety-critical Systems. - Shixin Ji; Xingzhen Chen; Wei Zhang 062; Zhuoping Yang; Jinming Zhuang; Sarah Schultz; Yukai Song; Jingtong Hu; Alex K. Jones; Zheng Dong 002; Peipei Zhou 001 (FPGA, 2025)

ARIES: An Agile MLIR-Based Compilation Flow for Reconfigurable Devices with AI Engines. - Jinming Zhuang; Shaojie Xiang; Hongzheng Chen; Niansong Zhang; Zhuoping Yang; Tony Mao; Zhiru Zhang; Peipei Zhou 001 (FPGA, 2025)

ART: Customizing Accelerators for DNN-Enabled Real-Time Safety-Critical Systems. - Shixin Ji; Xingzhen Chen; Jinming Zhuang; Wei Zhang 062; Zhuoping Yang; Sarah Schultz; Yukai Song; Jingtong Hu; Alex K. Jones; Zheng Dong 002; Peipei Zhou 001 (ACM Great Lakes Symposium on VLSI, 2025)

AGILE: Lightweight and Efficient Asynchronous GPU-SSD Integration. - Zhuoping Yang; Jinming Zhuang; Xingzhen Chen; Alex K. Jones; Peipei Zhou 001 (CoRR, 2025)

MTrain: Enable Efficient CNN Training on Heterogeneous FPGA-Based Edge Servers. - Yue Tang 002; Alex K. Jones; Jinjun Xiong; Peipei Zhou 001; Jingtong Hu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)