A Time Series Data Compression Co-processor Based on RISC-V Custom Instructions. - Peiran Du; Zhaohui Cai (ICA3PP (1), 2023)

Architectural and System Implications of CXL-enabled Tiered Memory. - Yujie Yang; Lingfeng Xiang; Peiran Du; Zhen Lin; Weishu Deng; Ren Wang 001; Andrey Kudryavtsev; Louis Ko; Hui Lu 001; Jia Rao (CoRR, 2025)

HGCA: Hybrid GPU-CPU Attention for Long Context LLM Inference. - Weishu Deng; Yujie Yang; Peiran Du; Lingfeng Xiang; Zhen Lin; Cheng-Zhong Xu 001; Song Jiang 001; Hui Lu 001; Jia Rao (CoRR, 2025)