Using Reconfigurable Computing Techniques to Accelerate Problems in the CAD Domain: A Case Study with Boolean Satisfiability. - Peixin Zhong; Pranav Ashar; Sharad Malik; Margaret Martonosi (DAC, 1998)

Accelerating Boolean Satisfiability with Configurable Hardware. - Peixin Zhong; Margaret Martonosi; Pranav Ashar; Sharad Malik (FCCM, 1998)

Solving Boolean Satisfiability with Dynamic Hardware Configurations. - Peixin Zhong; Margaret Martonosi; Pranav Ashar; Sharad Malik (FPL, 1998)

Using configurable computing to accelerate Boolean satisfiability. - Peixin Zhong; Margaret Martonosi; Pranav Ashar; Sharad Malik (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999)

An Architectural Power Estimator for Analog-to-Digital Converters. - Zhaohui Huang; Peixin Zhong (ICCD, 2004)

Hardware/Software Co-Modeling of SAT Solver Based on Distributed Computing Elements using SystemC. - Jinwen Xi; Peixin Zhong (ICCD, 2004)

Adaptive Analog-to-Digital Converter Platform for Mixed-Signal System-on-Chip. - Zhaohui Huang; Peixin Zhong (ESA, 2005)

Fast Energy Estimation of Multi-processor System-on-Chip with Energy Macro-Models for Embedded Microprocessors. - Jinwen Xi; Peixin Zhong (MSV, 2005)

A Transaction-Level NoC Simulation Platform with Architecture-Level Dynamic and Leakage Energy Models. - Jinwen Xi; Peixin Zhong (ACM Great Lakes Symposium on VLSI, 2006)

A System-level Network-on-Chip Simulation Framework Integrated with Low-level Analytical Models. - Jinwen Xi; Peixin Zhong (ICCD, 2006)