Parameters extraction on HfOX based RRAM. - Peng Huang 004; Bing Chen; Haitong Li; Zhe Chen; Bin Gao 006; Xiaoyan Liu; Jinfeng Kang (ESSDERC, 2014)

Scaling and operation characteristics of HfOx based vertical RRAM for 3D cross-point architecture. - Jinfeng Kang; Bin Gao 006; Bing Chen; Peng Huang 004; Feifei Zhang; Xiaoyan Liu; Hong-Yu Chen; Zizhen Jiang; H.-S. Philip Wong; Shimeng Yu (ISCAS, 2014)

Design guidelines for 3D RRAM cross-point architecture. - Shimeng Yu; Yexin Deng; Bin Gao 006; Peng Huang 004; Bing Chen; Xiaoyan Liu; Jinfeng Kang; Hong-Yu Chen; Zizhen Jiang; H.-S. Philip Wong (ISCAS, 2014)

Modeling and design optimization of ReRAM. - Jinfeng Kang; Haitong Li; Peng Huang 004; Zhe Chen; Bin Gao 006; Xiaoyan Liu; Zizhen Jiang; H.-S. Philip Wong (ASP-DAC, 2015)

Variation-aware, reliability-emphasized design and optimization of RRAM using SPICE model. - Haitong Li; Zizhen Jiang; Peng Huang 004; Y. Wu; Hong-Yu Chen; Bin Gao 006; Xiaoyan Liu; Jinfeng Kang; H.-S. Philip Wong (DATE, 2015)

RRAM based synaptic devices for neuromorphic visual systems. - Jinfeng Kang; Bin Gao 006; Peng Huang 004; Lifeng Liu; Xiaoyan Liu; H. Y. Yu; Shimeng Yu; H.-S. Philip Wong (DSP, 2015)

Physical understanding and optimization of resistive switching characteristics in oxide-RRAM. - Jinfeng Kang; Peng Huang 004; Zhe Chen; Yudi Zhao; Chen Liu 009; Runze Han; Lifeng Liu; Xiaoyan Liu; Yangyuan Wang; Bin Gao 006 (ESSDERC, 2016)

Device and Circuit Interaction Analysis of Stochastic Behaviors in Cross-Point RRAM Arrays. - Haitong Li; Peng Huang 004; Bin Gao 006; Xiaoyan Liu; Jinfeng Kang; H.-S. Philip Wong (CoRR, 2016)

PBTI evaluation of In0.65Ga0.35As/In0.53Ga0.47As nanowire FETs with Al2O3 and LaAlO3 gate dielectrics. - Yun Li; K. L. Wang; Shaoyan Di; Peng Huang 004; Gang Du; Xiao-Yan Liu (IRPS, 2018)

A Novel Convolution Computing Paradigm Based on NOR Flash Array with High Computing Speed and Energy Efficient. - Runze Han; Peng Huang 004; Yachen Xiang; Chen Liu 009; Zhekang Dong; Zhiqiang Su; Yongbo Liu; L. Liu; Xiaoyan Liu; Jinfeng Kang (ISCAS, 2018)

Design and Hardware Implementation of Neuromorphic Systems With RRAM Synapses and Threshold-Controlled Neurons for Pattern Recognition. - Yuning Jiang 004; Peng Huang 004; Dongbin Zhu; Zheng Zhou; Runze Han; Lifeng Liu; Xiaoyan Liu; Jinfeng Kang (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

Parallel Stateful Logic in RRAM: Theoretical Analysis and Arithmetic Design. - Feng Wang 046; Guojie Luo; Guangyu Sun 003; Jiaxi Zhang 001; Peng Huang 004; Jinfeng Kang (ASAP, 2019)

Flash-based Computing in-Memory Scheme for IOT. - Jinfeng Kang; Peng Huang 004; Runze Han; Yachen Xiang; Xiaole Cui; Xiaoyan Liu (ASICON, 2019)

3D Vertical RRAM Array and Device Co-design with Physics-based Spice Model. - Weiiie Xu; Yudi Zhao; Peng Huang 004; Xiaoyan Liu; Jinfeng Kang (ASICON, 2019)

FNSim: A Device-Circuit-Algorithm Codesigned Simulator for Flash based Neural Network. - Min Zhang; Peng Huang 004; Yizhou Zhang; Yachen Xiang; Runze Han; Lifeng Liu; Xiaoyan Liu; Jinfeng Kang (ASICON, 2019)

Analog Deep Neural Network Based on NOR Flash Computing Array for High Speed/Energy Efficiency Computation. - Yachen Xiang; Peng Huang 004; Zheng Zhou; Runze Han; Yuning Jiang 004; Q. M. Shu; Zhiqiang Su; Yongbo Liu; Xiaoyan Liu; Jinfeng Kang (ISCAS, 2019)

Efficient evaluation model including interconnect resistance effect for large scale RRAM crossbar array matrix computing. - Runze Han; Peng Huang 004; Yudi Zhao; Xiaole Cui; Xiaoyan Liu; Jinfeng Kang (Sci. China Inf. Sci., 2019)

Circuit design of RRAM-based neuromorphic hardware systems for classification and modified Hebbian learning. - Yuning Jiang 004; Peng Huang 004; Zheng Zhou; Jinfeng Kang (Sci. China Inf. Sci., 2019)

A Novel Convolution Computing Paradigm Based on NOR Flash Array With High Computing Speed and Energy Efficiency. - Runze Han; Peng Huang 004; Yachen Xiang; Chen Liu 009; Zhen Dong 003; Zhiqiang Su; Yongbo Liu; Lu Liu; Xiaoyan Liu; Jinfeng Kang (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

Novel Weight Mapping Method for Reliable NVM based Neural Network. - Lixia Han; Yachen Xiang; Peng Huang 004; Guihai Yu; Runze Han; Xiaoyan Liu; Jinfeng Kang (IRPS, 2021)

Flash Memory Array for Efficient Implementation of Deep Neural Networks. - Runze Han; Yachen Xiang; Peng Huang 004; Yihao Shan; Xiaoyan Liu; Jinfeng Kang (Adv. Intell. Syst., 2021)

Efficient Discrete Temporal Coding Spike-Driven In-Memory Computing Macro for Deep Neural Network Based on Nonvolatile Memory. - Lixia Han; Peng Huang 004; Yijiao Wang; Zheng Zhou; Yizhou Zhang; Xiaoyan Liu; Jinfeng Kang (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

Floating Gate Transistor-Based Accurate Digital In-Memory Computing for Deep Neural Networks. - Runze Han; Peng Huang 004; Yachen Xiang; Hong Hu; Sheng Lin; Peiyan Dong; Wensheng Shen; Yanzhi Wang; Xiaoyan Liu; Jinfeng Kang (Adv. Intell. Syst., 2022)

A Convolution Neural Network Accelerator Design with Weight Mapping and Pipeline Optimization. - Lixia Han; Peng Huang 004; Zheng Zhou; Yiyang Chen; Xiaoyan Liu; Jinfeng Kang (DAC, 2023)

Co-optimization strategy between array operation and weight mapping for flash computing arrays to achieve high computing efficiency and accuracy. - Guihai Yu; Peng Huang 004; Runze Han; Lixia Han; Xiaoyan Liu; Jinfeng Kang (Sci. China Inf. Sci., 2023)

An ultra-high-density and energy-efficient content addressable memory design based on 3D-NAND flash. - Haozhang Yang; Peng Huang 004; Runze Han; Xiaoyan Liu; Jinfeng Kang (Sci. China Inf. Sci., 2023)

A 3.3-Mbit/s true random number generator based on resistive random access memory. - Shiyue Song; Peng Huang 004; Wensheng Shen; Lifeng Liu; Jinfeng Kang (Sci. China Inf. Sci., 2023)

Pipeline Design of Nonvolatile-based Computing in Memory for Convolutional Neural Networks Inference Accelerators. - Lixia Han; Peng Huang 004; Zheng Zhou; Yiyang Chen; Haozhang Yang; Xiaoyan Liu; Jinfeng Kang (DATE, 2024)

Low Quantization Error Readout Circuit with Fully Charge-Domain Calculation for Computation-in-Memory Deep Neural Network. - Ao Shi; Yizhou Zhang; Lixia Han; Zheng Zhou; Yiyang Chen; Lifeng Liu; Linxiao Shen; Peng Huang 004; Xiaoyan Liu; Jinfeng Kang (ISCAS, 2024)

CoMN: Algorithm-Hardware Co-Design Platform for Nonvolatile Memory-Based Convolutional Neural Network Accelerators. - Lixia Han; Renjie Pan 003; Zheng Zhou; Hairuo Lu; Yiyang Chen; Haozhang Yang; Peng Huang 004; Guangyu Sun 003; Xiaoyan Liu; Jinfeng Kang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

Specific ADC of NVM-Based Computation-in-Memory for Deep Neural Networks. - Ao Shi; Yizhou Zhang; Lixia Han; Zheng Zhou; Yiyang Chen; Haozhang Yang; Lifeng Liu; Linxiao Shen; Xiaoyan Liu; Jinfeng Kang; Peng Huang 004 (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

Investigation on Temperature-Dependent Resistance States of 40nm MLC-RRAM Macro. - Haokai Guan; Yulin Feng; Shichao Zhong; Linbo Shan; Kefan Tao; Peng Huang 004; Zongwei Wang 001; Lei Sun; Lifeng Liu; Jinfeng Kang; Yimao Cai (IRPS, 2025)

Mitigating methodology of hardware non-ideal characteristics for non-volatile memory based neural networks. - Lixia Han; Peng Huang 004; Yijiao Wang; Zheng Zhou; Haozhang Yang; Yiyang Chen; Xiaoyan Liu; Jinfeng Kang (Sci. China Inf. Sci., 2025)

CIMUS: 3D-Stacked Computing-in-Memory Under Image Sensor Architecture for Efficient Machine Vision. - Lixia Han; Yiyang Chen; Siyuan Chen; Haozhang Yang; Ao Shi; Guihai Yu; Jiaqi Li; Zheng Zhou; Yijiao Wang; Yanzhi Wang; Xiaoyan Liu; Jinfeng Kang; et al. (IEEE Trans. Computers, 2025)

An Efficient Flash-Based Computing-in-Memory (CIM) Demonstration of High-Precision (32-bit) Nonlinear Partial Differential Equation (PDE) Solver With Ultra-High Endurance and Reliability. - Yang Feng; Zhaohui Sun; Chengcheng Wang; Xinyi Guo; Junyao Mei; Yueran Qi; Jing Liu 035; Junyu Zhang; Jixuan Wu; Xuepeng Zhan; Peng Huang 004; Jiezhi Chen (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)