CLAP: a crosstalk and loss analysis platform for optical interconnects. - Mahdi Nikdast; Luan H. K. Duong; Jiang Xu 001; Sébastien Le Beux; Xiaowen Wu; Zhehui Wang; Peng Yang 003; Yaoyao Ye (NOCS, 2014)

A Case Study of Signal-to-Noise Ratio in Ring-Based Optical Networks-on-Chip. - Luan H. K. Duong; Mahdi Nikdast; Sébastien Le Beux; Jiang Xu 001; Xiaowen Wu; Zhehui Wang; Peng Yang 003 (IEEE Des. Test, 2014)

System-Level Modeling and Analysis of Thermal Effects in WDM-Based Optical Networks-on-Chip. - Yaoyao Ye; Zhehui Wang; Peng Yang 003; Jiang Xu 001; Xiaowen Wu; Xuan Wang 001; Mahdi Nikdast; Zhe Wang 003; Luan H. K. Duong (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014)

Alleviate chip I/O pin constraints for multicore processors through optical interconnects. - Zhehui Wang; Jiang Xu 001; Peng Yang 003; Xuan Wang 001; Zhe Wang 003; Luan H. K. Duong; Zhifei Wang; Haoran Li 002; Rafael Kioji Vivas Maeda; Xiaowen Wu; Yaoyao Ye; Qinfen Hao (ASP-DAC, 2015)

Coherent crosstalk noise analyses in ring-based optical interconnects. - Luan H. K. Duong; Mahdi Nikdast; Jiang Xu 001; Zhehui Wang; Yvain Thonnart; Sébastien Le Beux; Peng Yang 003; Xiaowen Wu; Zhifei Wang (DATE, 2015)

Adaptively tolerate power-gating-induced power/ground noise under process variations. - Zhe Wang 003; Xuan Wang 001; Jiang Xu 001; Xiaowen Wu; Zhehui Wang; Peng Yang 003; Luan H. K. Duong; Haoran Li 002; Rafael Kioji Vivas Maeda; Zhifei Wang (DATE, 2015)

Memory Access Analysis of Many-core System with Abundant Bandwidth. - Chuan Tang; Dan Liu; Zuocheng Xing; Peng Yang 003; Zhe Wang 003; Jiang Xu 001 (MCSoC, 2015)

An Analytical Study of Power Delivery Systems for Many-Core Processors Using On-Chip and Off-Chip Voltage Regulators. - Xuan Wang 001; Jiang Xu 001; Zhe Wang 003; Kevin J. Chen; Xiaowen Wu; Zhehui Wang; Peng Yang 003; Luan H. K. Duong (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015)

Crosstalk Noise in WDM-Based Optical Networks-on-Chip: A Formal Study and Comparison. - Mahdi Nikdast; Jiang Xu 001; Luan Huu Kinh Duong; Xiaowen Wu; Xuan Wang 001; Zhehui Wang; Zhe Wang 003; Peng Yang 003; Yaoyao Ye; Qinfen Hao (IEEE Trans. Very Large Scale Integr. Syst., 2015)

JADE: a Heterogeneous Multiprocessor System Simulation Platform Using Recorded and Statistical Application Models. - Rafael K. V. Maeda; Peng Yang 003; Xiaowen Wu; Zhe Wang 003; Jiang Xu 001; Zhehui Wang; Haoran Li 002; Luan H. K. Duong; Zhifei Wang (AISTECS@HiPEAC, 2016)

Inter/intra-chip optical interconnection network: opportunities, challenges, and implementations. - Peng Yang 003; Shigeru Nakamura; Kenichiro Yashiki; Zhehui Wang; Luan H. K. Duong; Zhifei Wang; Xuanqi Chen; Yuichi Nakamura 002; Jiang Xu 001 (NOCS, 2016)

Alleviate Chip Pin Constraint for Multicore Processor by On/Off-Chip Power Delivery System Codesign. - Xuan Wang 001; Jiang Xu 001; Zhe Wang 003; Haoran Li 002; Peng Yang 003; Luan H. K. Duong; Rafael K. V. Maeda; Zhifei Wang (ACM J. Emerg. Technol. Comput. Syst., 2016)

Coherent and Incoherent Crosstalk Noise Analyses in Interchip/Intrachip Optical Interconnection Networks. - Luan H. K. Duong; Zhehui Wang; Mahdi Nikdast; Jiang Xu 001; Peng Yang 003; Zhifei Wang; Zhe Wang 003; Rafael K. V. Maeda; Haoran Li 002; Xuan Wang 001; Sébastien Le Beux; Yvain Thonnart (IEEE Trans. Very Large Scale Integr. Syst., 2016)

An Adaptive Process-Variation-Aware Technique for Power-Gating-Induced Power/Ground Noise Mitigation in MPSoC. - Zhe Wang 003; Xuan Wang 001; Jiang Xu 001; Haoran Li 002; Rafael K. V. Maeda; Zhehui Wang; Peng Yang 003; Luan H. K. Duong; Zhifei Wang (IEEE Trans. Very Large Scale Integr. Syst., 2016)

A Holistic Modeling and Analysis of Optical-Electrical Interfaces for Inter/Intra-chip Interconnects. - Zhehui Wang; Jiang Xu 001; Peng Yang 003; Luan Huu Kinh Duong; Zhifei Wang; Xuan Wang 001; Zhe Wang 003; Haoran Li 002; Rafael Kioji Vivas Maeda (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Improve Chip Pin Performance Using Optical Interconnects. - Zhehui Wang; Jiang Xu 001; Peng Yang 003; Xuan Wang 001; Zhe Wang 003; Luan Huu Kinh Duong; Zhifei Wang; Rafael Kioji Vivas Maeda; Haoran Li 002 (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Modular reinforcement learning for self-adaptive energy efficiency optimization in multicore system. - Zhe Wang 003; Zhongyuan Tian; Jiang Xu 001; Rafael K. V. Maeda; Haoran Li 002; Peng Yang 003; Zhehui Wang; Luan H. K. Duong; Zhifei Wang; Xuanqi Chen (ASP-DAC, 2017)

MOCA: an Inter/Intra-Chip Optical Network for Memory. - Zhehui Wang; Zhengbin Pang; Peng Yang 003; Jiang Xu 001; Xuanqi Chen; Rafael K. V. Maeda; Zhifei Wang; Luan H. K. Duong; Haoran Li 002; Zhe Wang 003 (DAC, 2017)

Adaptive power delivery system management for many-core processors with on/off-chip voltage regulators. - Haoran Li 002; Jiang Xu 001; Zhe Wang 003; Peng Yang 003; Rafael K. V. Maeda; Zhongyuan Tian (DATE, 2017)

Energy-Efficient Power Delivery System Paradigms for Many-Core Processors. - Haoran Li 002; Xuan Wang 001; Jiang Xu 001; Zhe Wang 003; Rafael K. V. Maeda; Zhehui Wang; Peng Yang 003; Luan H. K. Duong; Zhifei Wang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)

Multi-device collaborative management through knowledge sharing. - Zhongyuan Tian; Zhe Wang 003; Haoran Li 002; Peng Yang 003; Rafael Kioji Vivas Maeda; Jiang Xu 001 (ASP-DAC, 2018)

RSON: An inter/intra-chip silicon photonic network for rack-scale computing systems. - Peng Yang 003; Zhengbin Pang; Zhifei Wang; Zhehui Wang; Min Xie; Xuanqi Chen; Luan H. K. Duong; Jiang Xu 001 (DATE, 2018)

A Comprehensive Electro-Optical Model for Silicon Photonic Switches. - Xuanqi Chen; Zhifei Wang; Yi-Shing Chang; Jiang Xu 001; Peng Yang 003; Zhehui Wang; Luan H. K. Duong (ISVLSI, 2018)

Workload-Aware Adaptive Power Delivery System Management for Many-Core Processors. - Haoran Li 002; Jiang Xu 001; Zhe Wang 003; Rafael K. V. Maeda; Peng Yang 003; Zhongyuan Tian (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

A Systematic and Realistic Network-on-Chip Traffic Modeling and Generation Technique for Emerging Many-Core Systems. - Weichen Liu; Zhe Wang 003; Peng Yang 003; Jiang Xu 001; Bin Li 018; Ravi R. Iyer 001; Ramesh Illikkal (IEEE Trans. Multi Scale Comput. Syst., 2018)

Crosstalk Noise Reduction Through Adaptive Power Control in Inter/Intra-Chip Optical Networks. - Luan H. K. Duong; Peng Yang 003; Zhifei Wang; Yi-Shing Chang; Jiang Xu 001; Zhehui Wang; Xuanqi Chen (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

Collaborative Power Management Through Knowledge Sharing Among Multiple Devices. - Zhongyuan Tian; Zhe Wang 003; Jiang Xu 001; Haoran Li 002; Peng Yang 003; Rafael Kioji Vivas Maeda (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

Modeling and Analysis of Optical Modulators Based on Free-Carrier Plasma Dispersion Effect. - Xuanqi Chen; Zhifei Wang; Yi-Shing Chang; Jiang Xu 001; Jun Feng 008; Peng Yang 003; Zhehui Wang; Luan H. K. Duong (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

A Cross-Layer Optimization Framework for Integrated Optical Switches in Data Centers. - Zhifei Wang; Peng Yang 003; Yi-Shing Chang; Jiang Xu 001; Xuanqi Chen; Zhehui Wang; Jun Feng 008 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Multidomain Inter/Intrachip Silicon Photonic Networks for Energy-Efficient Rack-Scale Computing Systems. - Peng Yang 003; Zhehui Wang; Zhifei Wang; Jiang Xu 001; Yi-Shing Chang; Xuanqi Chen; Rafael K. V. Maeda; Jun Feng 008 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)