A 5-13.5 Gb/s Multistandard Receiver With High Jitter Tolerance Digital CDR in 40-nm CMOS Process. - Zhou Shu; Shalin Huang; Zhipeng Li; Peng Yin 004; Jiandong Zang; Dongbing Fu; Fang Tang; Amine Bermak (IEEE Trans. Circuits Syst., 2020)

A Low-Area and Low-Power Comma Detection and Word Alignment Circuits for JESD204B/C Controller. - Peng Yin 004; Zhou Shu; Yingjun Xia; Tianmei Shen; Xiao Guan; Xiaoqin Wang; Umar Mohammad; Jiandong Zang; Dongbing Fu; Xiaoping Zeng; Fang Tang; Amine Bermak (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

A Tunable Parameter, High Linearity Time-to-Digital Converter Implemented in 28-nm FPGA. - Jun Deng; Peng Yin 004; Xin Lei; Zhou Shu; Ming-Chun Tang; Fang Tang (IEEE Trans. Instrum. Meas., 2021)

A Low-Area Low-Power Column-parallel Digital Decimation Filter Using 1-Bit Pre-BWI Topology for CMOS Image Sensor in 40-nm CMOS Process. - Peng Yin 004; Zhongjie Wang; Yingjun Xia; Xiaoping Zeng; Fang Tang (Circuits Syst. Signal Process., 2022)

An Automatic Clock-Induced-Spurs Detector Based on Energy Detection for Direct Digital Frequency Synthesizer. - Xin Lei; Junan Zhang; Jun Deng; Peng Yin 004; Zhou Shu; Fang Tang (Sensors, 2022)

A Sub-1/°C Bandgap Voltage Reference With High-Order Temperature Compensation in 0.18-μm CMOS Process. - Shalin Huang; Mingdong Li; Huan Li; Peng Yin 004; Zhou Shu; Amine Bermak; Fang Tang (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

A High-Logic-Density, Low-Power Control Character Detection and Identification Circuit for the JESD204B Data Link Layer. - Qiushi Wang; Peng Yin 004; Nairiga Wu; Amine Bermak; Fang Tang (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

Robust transmission for multi-user OFDM-based IRS-assisted cognitive radio networks. - Junpeng Gao; Jihua Zhou; Tao Zhao; Chen Yi; Baoze Ma; Peng Yin 004 (Digit. Signal Process., 2024)

Theory and Low-Power Design of Moving Accumulative Sign Filter. - Yingjun Xia; Jianjiang Luo; Peng Yin 004; Dengwei Yan; Xichuan Zhou; Amine Bermak; Fang Tang (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

High Logic Density Cyclic Redundancy Check and Forward Error Correction Logic Sharing Encoding Circuit for JESD204C Controller. - Peng Yin 004; Hongli Chen; Yingjun Xia; Jinlong Zhang; Mingguo Liu; Cheng Gu; Weizhou Hou; Amine Bermak; Fang Tang (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)