Efficient Implementation of Finite Field Arithmetic for Binary Ring-LWE Post-Quantum Cryptography Through a Novel Lookup-Table-Like Method. - Jiafeng Xie; Pengzhou He; Wujie Wen (DAC, 2021)

CROP: FPGA Implementation of High-Performance Polynomial Multiplication in Saber KEM based on Novel Cyclic-Row Oriented Processing Strategy. - Jiafeng Xie; Pengzhou He; Chiou-Yng Lee (ICCD, 2021)

Novel Low-Complexity Polynomial Multiplication Over Hybrid Fields for Efficient Implementation of Binary Ring-LWE Post-Quantum Cryptography. - Pengzhou He; Ujjwal Guin; Jiafeng Xie (IEEE J. Emerg. Sel. Topics Circuits Syst., 2021)

Work-in-Progress: High-Performance Systolic Hardware Accelerator for RBLWE-based Post-Quantum Cryptography. - Tianyou Bao; José Luis Imaña; Pengzhou He; Jiafeng Xie (CODES+ISSS, 2022)

HPMA-NTRU: High-Performance Polynomial Multiplication Accelerator for NTRU. - Pengzhou He; Yazheng Tu; Ayesha Khalid; Máire O'Neill; Jiafeng Xie (DFT, 2022)

Ultra Low-Complexity Implementation of Binary Ring-LWE based Post-Quantum Cryptography on FPGA Platform. - Jiafeng Xie; Pengzhou He; Tianyou Bao (FPGA, 2022)

Systolic Acceleration of Polynomial Multiplication for KEM Saber and Binary Ring-LWE Post-Quantum Cryptography. - Tianyou Bao; Pengzhou He; Jiafeng Xie (HOST, 2022)

HPMA-Saber: High-Performance Polynomial Multiplication Accelerator for KEM Saber. - Pengzhou He; Tianyou Bao; Yazheng Tu; Jiafeng Xie (ICCD, 2022)

Hardware Implementation of High-Performance Polynomial Multiplication for KEM Saber. - Yazheng Tu; Pengzhou He; Chiou-Yng Lee; Danai Chasaki; Jiafeng Xie (ISCAS, 2022)

Lightweight Hardware Implementation of Binary Ring-LWE PQC Accelerator. - Benjamin J. Lucas; Ali Alwan; Marion Murzello; Yazheng Tu; Pengzhou He; Andrew J. Schwartz; David Guevara; Ujjwal Guin; Kyle Juretus; Jiafeng Xie (IEEE Comput. Archit. Lett., 2022)

High-Performance Polynomial Multiplication Hardware Accelerators for KEM Saber and NTRU. - Elizabeth Carter; Pengzhou He; Jiafeng Xie (IACR Cryptol. ePrint Arch., 2022)

Efficient Hardware Arithmetic for Inverted Binary Ring-LWE Based Post-Quantum Cryptography. - José Luis Imaña; Pengzhou He; Tianyou Bao; Yazheng Tu; Jiafeng Xie (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

Efficient Hardware Implementation of Finite Field Arithmetic $AB+C$AB+C for Binary Ring-LWE Based Post-Quantum Cryptography. - Jiafeng Xie; Pengzhou He; Xiaofang Wang; José Luis Imaña (IEEE Trans. Emerg. Top. Comput., 2022)

Efficient Implementation of Ring-Binary-LWE-based Lightweight PQC Accelerator on the FPGA Platform. - Pengzhou He; Tianyou Bao; Yazheng Tu; Jiafeng Xie (FCCM, 2023)

LOCS: LOw-Latency and ConStant-Timing Implementation of Fixed-Weight Sampler for HQC. - Pengzhou He; Yazheng Tu; Jiafeng Xie (ISCAS, 2023)

Novel Implementation of High-Performance Polynomial Multiplication for Unified KEM Saber based on TMVP Design Strategy. - Pengzhou He; Jiafeng Xie (ISQED, 2023)

Hardware-Implemented Lightweight Accelerator for Large Integer Polynomial Multiplication. - Pengzhou He; Yazheng Tu; Çetin Kaya Koç; Jiafeng Xie (IEEE Comput. Archit. Lett., 2023)

Efficient Hardware RNS Decomposition for Post-Quantum Signature Scheme FALCON. - Samuel Coulon; Pengzhou He; Tianyou Bao; Jiafeng Xie (IACR Cryptol. ePrint Arch., 2023)

COPMA: Compact and Optimized Polynomial Multiplier Accelerator for High-Performance Implementation of LWR-Based PQC. - Pengzhou He; Yazheng Tu; Tianyou Bao; Leonel Sousa; Jiafeng Xie (IEEE Trans. Very Large Scale Integr. Syst., 2023)

LEAP: Lightweight and Efficient Accelerator for Sparse Polynomial Multiplication of HQC. - Yazheng Tu; Pengzhou He; Çetin Kaya Koç; Jiafeng Xie (IEEE Trans. Very Large Scale Integr. Syst., 2023)

FPGA Implementation of Compact Hardware Accelerators for Ring-Binary-LWE-based Post-quantum Cryptography. - Pengzhou He; Tianyou Bao; Jiafeng Xie; Moeness G. Amin (ACM Trans. Reconfigurable Technol. Syst., 2023)

KINA: Karatsuba Initiated Novel Accelerator for Ring-Binary-LWE (RBLWE)-Based Post-Quantum Cryptography. - Pengzhou He; Yazheng Tu; Jiafeng Xie; H. S. Jacinto (IEEE Trans. Very Large Scale Integr. Syst., 2023)

LAMP: Efficient Implementation of Lightweight Accelerator for Polynomial MultiPlication, From Falcon to RBLWE-ENC. - Pengzhou He; Ben Mongirdas; Çetin Kaya Koç; Jiafeng Xie (ACM Great Lakes Symposium on VLSI, 2024)

Invited Paper: Enhancing Privacy-Preserving Computing with Optimized CKKS Encryption: A Hardware Acceleration Approach. - Tianyou Bao; Pengzhou He; Jiafeng Xie (ICCAD, 2024)

HELP: Highly Efficient and Low-Latency Hardware Accelerator for Integer Polynomial Multiplication. - Pengzhou He; Tianyou Bao; Çetin Kaya Koç; Jiafeng Xie (ISVLSI, 2024)

SMALL: Scalable Matrix OriginAted Large Integer PoLynomial Multiplication Accelerator for Lattice-Based Post-Quantum Cryptography. - Jiafeng Xie; Pengzhou He; Samira Carolina Oliva Madrigal; Çetin Kaya Koç (WAIFI, 2024)

LTE: Lightweight and Time-Efficient Hardware Encoder for Post-Quantum Scheme HQC. - Yazheng Tu; Pengzhou He; Chip-Hong Chang; Jiafeng Xie (IEEE Comput. Archit. Lett., 2024)

CASA: A Compact and Scalable Accelerator for Approximate Homomorphic Encryption. - Pengzhou He; Samira Carolina Oliva Madrigal; Çetin Kaya Koç; Tianyou Bao; Jiafeng Xie (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024)

TINA: TMVP-Initiated Novel Accelerator for Lightweight Ring-LWE-Based PQC. - Tianyou Bao; Pengzhou He; Shi Bai 001; Jiafeng Xie (IEEE Trans. Very Large Scale Integr. Syst., 2024)

AEKA: FPGA Implementation of Area-Efficient Karatsuba Accelerator for Ring-Binary-LWE-Based Lightweight PQC. - Tianyou Bao; Pengzhou He; Jiafeng Xie; H. S. Jacinto (ACM Trans. Reconfigurable Technol. Syst., 2024)

LTE: Lightweight and Timing-Efficient Unequal-Sized Polynomial Multiplication Accelerators. - Yazheng Tu; Tianyou Bao; Pengzhou He; Leonel Sousa; Jiafeng Xie (IEEE Trans. Circuits Syst. II Express Briefs, 2025)

HSPA: High-Throughput Sparse Polynomial Multiplication for Code-based Post-Quantum Cryptography. - Pengzhou He; Yazheng Tu; Tianyou Bao; Çetin Çetin Koç; Jiafeng Xie (ACM Trans. Embed. Comput. Syst., 2025)

High-Performance Instruction-Set Hardware Accelerator for Ring-Binary-LWE-Based Lightweight PQC. - Pengzhou He; Tianyou Bao; Jiafeng Xie (IEEE Trans. Very Large Scale Integr. Syst., 2025)

CHIRP: Compact and High-Performance FPGA Implementation of Unified Hardware Accelerators for Ring-Binary-LWE-based PQC. - Tianyou Bao; Pengzhou He; Daisuke Fujimoto; Yuichi Hayashi; Jiafeng Xie (ACM Trans. Reconfigurable Technol. Syst., 2025)