Dynamic techniques to reduce memory traffic in embedded systems. - Ben H. H. Juurlink; Pepijn J. de Langen (Conf. Computing Frontiers, 2004)

Reducing traffic generated by conflict misses in caches. - Pepijn J. de Langen; Ben H. H. Juurlink (Conf. Computing Frontiers, 2004)

Leakage-aware multiprocessor scheduling for low power. - Pepijn J. de Langen; Ben H. H. Juurlink (IPDPS, 2006)

Trade-Offs Between Voltage Scaling and Processor Shutdown for Low-Energy Embedded Multiprocessors. - Pepijn J. de Langen; Ben H. H. Juurlink (SAMOS, 2007)

Memory copies in multi-level memory systems. - Pepijn J. de Langen; Ben H. H. Juurlink (ASAP, 2008)

Limiting the number of dirty cache lines. - Pepijn J. de Langen; Ben H. H. Juurlink (DATE, 2009)

Leakage-Aware Multiprocessor Scheduling. - Pepijn J. de Langen; Ben H. H. Juurlink (J. Signal Process. Syst., 2009)