System on Wafer: A New Silicon Concept in SiP. - Gilles Poupon; Nicolas Sillon; David Henry; Charlotte Gillot; Alan Mathewson; Léa Di Cioccio; Barbara Charlet; Patrick Leduc; Maud Vinet; Perrine Batude (Proc. IEEE, 2009)

Performance analysis of 3-D monolithic integrated circuits. - Shashikanth Bobba; Ashutosh Chakraborty; Olivier Thomas; Perrine Batude; Vasilis F. Pavlidis; Giovanni De Micheli (3DIC, 2010)

CELONCEL: Effective design technique for 3-D monolithic integration targeting high performance integrated circuits. - Shashikanth Bobba; Ashutosh Chakraborty; Olivier Thomas; Perrine Batude; Thomas Ernst 005; Olivier Faynot; David Z. Pan; Giovanni De Micheli (ASP-DAC, 2011)

3D monolithic integration. - Perrine Batude; Maud Vinet; Arnaud Pouydebasque; Cyrille Le Royer; Bernard Previtali; Claude Tabone; Jean-Michel Hartmann; Loic Sanchez; Laurence Baud; Veronique Carron; Alain Toffoli; Fabienne Allain; et al. (ISCAS, 2011)

Analytical modeling of parasitics in monolithically integrated 3D inverters. - Joris Lacord; Perrine Batude; Gérard Ghibaudo; Frédéric Boeuf (ICICDT, 2012)

3-D Sequential Integration: A Key Enabling Technology for Heterogeneous Co-Integration of New Function With CMOS. - Perrine Batude; Thomas Ernst 005; Julien Arcamone; Gregory Arndt; Perceval Coudrain; Pierre-Emmanuel Gaillardon (IEEE J. Emerg. Sel. Topics Circuits Syst., 2012)

Cell transformations and physical design techniques for 3D monolithic integrated circuits. - Shashikanth Bobba; Ashutosh Chakraborty; Olivier Thomas; Perrine Batude; Giovanni De Micheli (ACM J. Emerg. Technol. Comput. Syst., 2013)

3D FPGA using high-density interconnect Monolithic Integration. - Ogun Turkyilmaz; Gerald Cibrario; Olivier Rozeau; Perrine Batude; Fabien Clermidy (DATE, 2014)

FDSOI bottom MOSFETs stability versus top transistor thermal budget featuring 3D monolithic integration. - Claire Fenouillet-Béranger; Bernard Previtali; Perrine Batude; Fabrice Nemouchi; Mikaël Cassé; Xavier Garros; Lucie Tosti; Nils Rambal; Dominique Lafond; Hugo Dansas; Luca Pasini; Laurent Brunet; et al. (ESSDERC, 2014)

Intermediate BEOL process influence on power and performance for 3DVLSI. - Hossam Sarhan; Sébastien Thuries; Olivier Billoint; Fabien Deprat; Alexandre Ayres De Sousa; Perrine Batude; Claire Fenouillet-Béranger; Fabien Clermidy (3DIC, 2015)

A comprehensive study of monolithic 3D cell on cell design using commercial 2D tool. - Olivier Billoint; Hossam Sarhan; Iyad Rayane; Maud Vinet; Perrine Batude; Claire Fenouillet-Béranger; Olivier Rozeau; Gerald Cibrario; Fabien Deprat; A. Fustier; Julien Michallet; Olivier Faynot; et al. (DATE, 2015)

From 2D to Monolithic 3D: Design Possibilities, Expectations and Challenges. - Olivier Billoint; Hossam Sarhan; Iyad Rayane; Maud Vinet; Perrine Batude; Claire Fenouillet-Béranger; Olivier Rozeau; Gerald Cibrario; Fabien Deprat; Ogun Turkyilmaz; Sébastien Thuries; Fabien Clermidy (ISPD, 2015)

Towards high density 3D interconnections. - Séverine Cheramy; Amadine Jouve; Lucile Arnaud; Claire Fenouillet-Béranger; Perrine Batude; Maud Vinet (3DIC, 2016)

Impact of intermediate BEOL technology on standard cell performances of 3D VLSI. - Melanie Brocard; Guillaume Berhault; Sébastien Thuries; Fabien Clermidy; Perrine Batude; Claire Fenouillet-Béranger; Laurent Brunet; François Andrieu; Fabien Deprat; Joris Lacord; Olivier Rozeau; Gerald Cibrario; et al. (ESSDERC, 2016)

Opportunities brought by sequential 3D CoolCube™ integration. - Maud Vinet; Perrine Batude; Claire Fenouillet-Béranger; Laurent Brunet; Vincent Mazzocchi; Cao-Minh Vincent Lu; Fabien Deprat; Jessy Micout; Bernard Previtali; Paul Besombes; Nils Rambal; François Andrieu; et al. (ESSDERC, 2016)

Recent advances in 3D VLSI integration. - Claire Fenouillet-Béranger; Perrine Batude; Laurent Brunet; Vincent Mazzocchi; Cao-Minh Vincent Lu; Fabien Deprat; Jessy Micout; M.-P. Samson; Bernard Previtali; Paul Besombes; Nils Rambal; François Andrieu; et al. (ICICDT, 2016)

Guidelines for intermediate back end of line (BEOL) for 3D sequential integration. - Claire Fenouillet-Béranger; S. Beaurepaire; Fabien Deprat; Alexandre Ayres De Sousa; Laurent Brunet; Perrine Batude; Olivier Rozeau; François Andrieu; Paul Besombes; M.-P. Samson; Bernard Previtali; F. Nemouchi; et al. (ESSDERC, 2017)

Precise EOT regrowth extraction enabling performance analysis of low temperature extension first devices. - Jessy Micout; Quentin Rafhay; Xavier Garros; Mikaël Cassé; Jean Coignus; Luca Pasini; Cao-Minh Vincent Lu; Nils Rambal; Claire Fenouillet-Béranger; Laurent Brunet; G. Romano; R. Gassilloud; et al. (ESSDERC, 2017)

Transistor Temperature Deviation Analysis in Monolithic 3D Standard Cells. - Melanie Brocard; Benoît Mathieu; Jean-Philippe Colonna; Cristiano Santos; Claire Fenouillet-Béranger; Cao-Minh Vincent Lu; Gerald Cibrario; Laurent Brunet; Perrine Batude; François Andrieu; Sébastien Thuries; Olivier Billoint (ISVLSI, 2017)

Monolithic 3D: an alternative to advanced CMOS scaling, technology perspectives and associated design methodology challenges. - Pascal Vivet; Sébastien Thuries; Olivier Billoint; Sylvain Choisnet; Didier Lattard; Edith Beigné; Perrine Batude (ICECS, 2018)

A review on opportunities brought by 3D-monolithic integration for CMOS device and digital circuit. - François Andrieu; Perrine Batude; Laurent Brunet; Claire Fenouillet-Béranger; Didier Lattard; Sébastien Thuries; Olivier Billoint; Richard Fournel; Maud Vinet (ICICDT, 2018)

Advanced 3D Technologies and Architectures for 3D Smart Image Sensors. - Pascal Vivet; Gilles Sicard; Laurent Millet; Stéphane Chevobbe; Karim Ben Chehida; Luis Angel Cubero; Monte Alegre; Maxence Bouvier; Alexandre Valentian; Maria Lepecq; Thomas Dombek; Olivier Bichler; et al. (DATE, 2019)

M3D-ADTCO: Monolithic 3D Architecture, Design and Technology Co-Optimization for High Energy Efficient 3D IC. - Sébastien Thuries; Olivier Billoint; Sylvain Choisnet; Romain Lemaire; Pascal Vivet; Perrine Batude; Didier Lattard (DATE, 2020)

Inter-tier Coupling Analysis in Back-illuminated Monolithic 3DSI Image Sensor Pixels. - Petros Sideris; Arnaud Peizerat; Perrine Batude; Christoforos G. Theodorou; Gilles Sicard (MOCAST, 2021)

Methodology for Active Junction Profile Extraction in thin film FD-SOI Enabling performance driver identification in 500°C devices for 3D sequential integration. - Tadeu Mota Frutuoso; Xavier Garros; Perrine Batude; Laurent Brunet; Joris Lacord; Benoit Sklénard; V. Lapras; Claire Fenouillet-Béranger; M. Ribotta; A. Magalhaes-Lucas; J. Kanyandekwe; R. Kies; et al. (VLSI Technology and Circuits, 2022)

Breakthrough Processes for Si CMOS Devices with BEOL Compatibility for 3D Sequential Integrated more than Moore Analog Applications. - Daphnée Bosch; Abygaël Viey; Tadeu Mota Frutuoso; P. Lheritier; C. Licitra; Nada Zerhouni; A. Albouy; Laurent Brunet; A. Magalhaes-Lucas; L. M. B. da Silva; H. Boutry; M. Husien Fahmy Taha Abdelrahman; et al. (VLSI Technology and Circuits, 2024)

First Radio-Frequency Circuits Fabricated in Top-Tier of a Full 3D Sequential Integration Process at mmW for 5G Applications. - J. Luge-Alvarez; J. B. David; Alexandre Siligaris; Vincent Puyal; G. Moritz; Tadeu Mota Frutuoso; V. Lapras; Claire Fenouillet-Béranger; Laurent Brunet; P. Vincent; Didier Lattard; Xavier Garros; et al. (VLSI Technology and Circuits, 2024)