Multi-port interconnection networks for radix-R algorithms. - Jarmo Takala; Tuomas Järvinen; Perttu Salmela; David Akopian (ICASSP, 2001)

On allocation of turbo decoder iterations. - Perttu Salmela; Tuomas Järvinen; Teemu Sipilä; Jarmo Takala (PIMRC, 2003)

Parallel memory access in turbo decoders. - Perttu Salmela; Tuomas Järvinen; Teemu Sipilä; Jarmo Takala (PIMRC, 2003)

In-Place Storage of Path Metrics in Viterbi Decoders. - Tuomas Järvinen; Perttu Salmela; Teemu Sipilä; Jarmo Takala (VLSI-SOC, 2003)

Complex Fixed-Point Matrix Inversion Using Transport Triggered Architecture. - Adrian Burian; Perttu Salmela; Jarmo Takala (ASAP, 2005)

256-State Rate 1/2 Viterbi Decoder on TTA Processor. - Perttu Salmela; Tuomas Järvinen; Teemu Sipilä; Jarmo Takala (ASAP, 2005)

Efficient byte permutation realizations for compact AES implementations. - Tuomas Järvinen; Perttu Salmela; Panu Hämäläinen; Jarmo Takala (EUSIPCO, 2005)

Systematic approach for path metric access in Viterbi decoders. - Tuomas Järvinen; Perttu Salmela; Teemu Sipilä; Jarmo Takala (IEEE Trans. Commun., 2005)

Evaluation of stride permutation networks. - Tuomas Järvinen; Perttu Salmela; Konsta Punkka; Jarmo Takala (ISCAS, 2006)

Loop Scheduling for Transport Triggered Architecture Processors. - Perttu Salmela; Risto Mäkinen; Pekka Jääskeläinen; Jarmo Takala (SoC, 2006)

Register File Partitioning with Constraint Programming. - Perttu Salmela; Chung-Ching Shen; Shuvra S. Bhattacharyya; Jarmo Takala (SoC, 2006)

Software Pipelining Support for Transport Triggered Architecture Processors. - Perttu Salmela; Pekka Jääskeläinen; Tuomas Järvinen; Jarmo Takala (SAMOS, 2006)

Efficient parallel memory organization for turbo decoders. - Perttu Salmela; Ruirui Gu; Shuvra S. Bhattacharyya; Jarmo Takala (EUSIPCO, 2007)

Memory-Based List Updating for List Sphere Decoders. - Perttu Salmela; Juho Antikainen; Olli Silvén; Jarmo Takala (SiPS, 2007)

Synthesis of DSP Architectures Using Libraries of Coarse-Grain Configurations. - Perttu Salmela; Chung-Ching Shen; Shuvra S. Bhattacharyya; Jarmo Takala (SiPS, 2007)

Application-Specific Instruction Set Processor Implementation of List Sphere Detector. - Juho Antikainen; Perttu Salmela; Olli Silvén; Markku J. Juntti; Jarmo Takala; Markus Myllylä (EURASIP J. Embed. Syst., 2007)

Stride Permutation Networks for Array Processors. - Tuomas Järvinen; Perttu Salmela; Harri Sorokin; Jarmo Takala (J. VLSI Signal Process., 2007)

Complex-valued QR decomposition implementation for MIMO receivers. - Perttu Salmela; Adrian Burian; Harri Sorokin; Jarmo Takala (ICASSP, 2008)

Fine-grained application-specific instruction set processor design for the K-best list sphere detector algorithm. - Juho Antikainen; Perttu Salmela; Olli Silvén; Markku J. Juntti; Jarmo Takala; Markus Myllylä (ICSAMOS, 2008)

Low-complexity polynomials modulo integer with linearly incremented variable. - Perttu Salmela; Harri Sorokin; Jarmo Takala (SiPS, 2008)

A Programmable Max-Log-MAP Turbo Decoder Implementation. - Perttu Salmela; Harri Sorokin; Jarmo Takala (VLSI Design, 2008)

Reconfigurable video decoder with transform acceleration. - Lassi Nurmi; Perttu Salmela; Pertti Kellomäki; Pekka Jääskeläinen; Jarmo Takala (SiPS, 2009)

3G Long Term Evolution Baseband Processing with Application-Specific Processors. - Perttu Salmela; Juho Antikainen; Teemu Pitkänen; Olli Silvén; Jarmo Takala (Int. J. Digit. Multim. Broadcast., 2009)

Implementations of baseband functions for digital receivers. - Perttu Salmela (2009)

Fixed- versus floating-point implementation of MIMO-OFDM detector. - Janne Janhunen; Perttu Salmela; Olli Silvén; Markku J. Juntti (ICASSP, 2011)

Design Methodology for Offloading Software Executions to FPGA. - Tomasz Patyk; Perttu Salmela; Teemu Pitkänen; Pekka Jääskeläinen; Jarmo Takala (J. Signal Process. Syst., 2011)