Prospects and Challenges of Handling Power Bus Modeling and Supply Noise in Package-Chip C0-design Approach. - Pervez Khaled; Masud H. Chowdhury (APCCAS, 2006)

Fast bus waveform estimation at the presence of coupling noise. - Jingye Xu; Pervez Khaled; Masud H. Chowdhury (ACM Great Lakes Symposium on VLSI, 2008)

Innovative power gating for leakage reduction. - Masud H. Chowdhury; Juliana Gjanci; Pervez Khaled (ISCAS, 2008)

Full waveform accuracy to estimate delay in coupled digital circuits. - Jingye Xu; Pervez Khaled; Masud H. Chowdhury (ISCAS, 2008)

Controlling Ground Bounce Noise in Power Gating Scheme for System-on-a-Chip. - Masud H. Chowdhury; Juliana Gjanci; Pervez Khaled (ISVLSI, 2008)

An Innovative Power-Gating Technique for Leakage and Ground Bounce Control in System-on-a-Chip (SOC). - Masud H. Chowdhury; Pervez Khaled; Juliana Gjanci (Circuits Syst. Signal Process., 2011)