Miniature CCD-based analog adaptive filters. - Colin F. N. Cowan; H. Martin Reekie; John Mavor; John W. Arthur; Peter B. Denyer (ICASSP, 1980)

Case studies in VLSI signal processing using a silicon compiler. - Peter B. Denyer; David Renshaw 001 (ICASSP, 1983)

Design and realisation of adaptive lattice filters. - Malcolm J. Rutter; Peter M. Grant; David Renshaw 001; Peter B. Denyer (ICASSP, 1983)

Self-Testing in Bit Serial VLSI Parts: High Coverage at Low Cost. - Alan F. Murray; Peter B. Denyer; David Renshaw 001 (ITC, 1983)

A bit serial linear array DFT. - Gregory H. Allen; Peter B. Denyer; David Renshaw 001 (ICASSP, 1984)

A bit serial LDI recursive digital filter. - Laurence E. Turner; Peter B. Denyer; David Renshaw 001 (ICASSP, 1984)

Efficient bit-serial complex multiplication and sum-of-products computation using distributed arithmetic. - Steven G. Smith; Peter B. Denyer (ICASSP, 1986)

A comparison of micro-DSP and Silicon compiler implementations of a polyphase network filter bank. - Steven G. Smith; A. Fitzgerald; Peter B. Denyer; David Renshaw 001; N. P. Wootton; R. Creasey (ICASSP, 1986)

Advanced Microelectronics as a Foundation for Future Computers (Panel). - Peter B. Denyer (IFIP Congress, 1986)

Synthesis of area-efficient VLSI architectures for vector and matrix multiplication. - Steven G. Smith; Peter B. Denyer (IEEE Symposium on Computer Arithmetic, 1987)

Serial/Parallel architectures for area-efficient vector multiplication. - Steven G. Smith; Peter B. Denyer (ICASSP, 1987)

Full-span structural compilation of DSP hardware. - Steven G. Smith; Peter B. Denyer; David Renshaw 001; K. Asada; K. P. Coplan; Michael Keightley; Javeed I. Mhar (ICASSP, 1987)

Techniques to increase the computational throughput of bit-serial architectures. - Steven G. Smith; M. S. McGregor; Peter B. Denyer (ICASSP, 1987)

Advanced Serial-Data Computation. - Steven G. Smith; Peter B. Denyer (J. Parallel Distributed Comput., 1988)

A WSI approach towards defect/fault-tolerant reconfigurable serial systems. - Wei Chen; John Mavor; Peter B. Denyer; David Renshaw 001 (IEEE J. Solid State Circuits, 1988)

SECOND: synthesis of elementary circuits on demand. - Stewart G. Smith; Michael Keightley; Peter B. Denyer; Shigenori Nagara (IEEE J. Solid State Circuits, 1988)

Synthesis of address generators. - Douglas M. Grant; Peter B. Denyer; I. Finlay (ICCAD, 1989)

Memory, Control and Communications Synthesis for Scheduled Algorithms. - Douglas M. Grant; Peter B. Denyer (DAC, 1990)

A new approach to pipeline optimisation. - David J. Mallon; Peter B. Denyer (EURO-DAC, 1990)

Address Generation for array access based on modulus m counters. - Douglas M. Grant; Peter B. Denyer (EURO-DAC, 1991)

On-Chip CMOS Sensors for VLSI Imaging Systems. - Peter B. Denyer; David Renshaw 001; Gouyu Wang; Ming Ying Lu; Stuart Anderson (VLSI, 1991)

A Comparison of Vector Quantization Codebook Generation Algorithms Applied to Automatic Face Recognition. - C. S. Ramsay; K. Sutherland; David Renshaw 001; Peter B. Denyer (BMVC, 1992)

JavaTM in electronic design automation. - Peter B. Denyer; Jean Brouwers (ASP-DAC, 1997)

A single-chip CMOS 306×244-pixel NTSC video camera and a descendant coprocessor device. - Stewart G. Smith; J. E. D. Hurwitz; Mairi J. Torrie; Donald J. Baxter; Andrew A. Murray; Paul Likoudis; Andrew J. Holmes; Mark J. Panaghiston; Robert K. Henderson; Stuart Anderson; Peter B. Denyer; David Renshaw 001 (IEEE J. Solid State Circuits, 1998)