Design of Low Power Memristor Non-Volatile Dram Cell with Footer Switch. - Peter Bukelani Musiiwa; Shyam Akashe (ICTCS, 2016)

Design of 8T Volatile and Non-Volatile RAM Cells with Improved Holding Phase Performance. - Peter Bukelani Musiiwa; Shyam Akashe (J. Low Power Electron., 2016)

Holding State Performance Amelioration by Exploitation of NMOS Body Effect in 1T DRAM Cells. - Peter Bukelani Musiiwa; Shyam Akashe (Wirel. Pers. Commun., 2018)