Hardware-Accelerated Cryptography for Software-Defined Networks with P4. - Lukas Malina; David Smekal; Sara Ricci; Jan Hajny; Peter Cíbik; Jakub Hrabovsky (SECITC, 2020)

Implementing CRYSTALS-Dilithium Signature Scheme on FPGAs. - Sara Ricci; Lukas Malina; Petr Jedlicka; David Smékal; Jan Hajny; Peter Cíbik; Petr Dzurenda; Patrik Dobias (ARES, 2021)

Hardware-based Cryptographic Accelerator for Post Quantum Era. - Lukas Malina; Peter Cíbik; Petr Jedlicka; David Smekal; Sara Ricci; Jakub Hrabovsky (ICUMT, 2021)

Towards CRYSTALS-Kyber VHDL Implementation. - Sara Ricci; Petr Jedlicka; Peter Cíbik; Petr Dzurenda; Lukas Malina; Jan Hajny (SECRYPT, 2021)

Implementing CRYSTALS-Dilithium Signature Scheme on FPGAs. - Sara Ricci; Lukas Malina; Petr Jedlicka; David Smekal; Jan Hajny; Peter Cíbik; Patrik Dobias (IACR Cryptol. ePrint Arch., 2021)

Pushing AES-256-GCM to Limits: Design, Implementation and Real FPGA Tests. - Peter Cíbik; Patrik Dobias; Sara Ricci; Jan Hajny; Lukas Malina; Petr Jedlicka; David Smekal (ACNS Workshops (1), 2024)

Quantum-resistant hardware-accelerated IoT traffic encryptor. - Peter Cíbik; Sara Ricci; Patrik Dobias; Jan Hajny; Lukas Malina; Jan Havlin (Internet Things, 2025)