A Framework for Design and Implementation of Adaptive Digital Predistortion Systems. - Lin Li 029; Peter Deaville; Adrian E. Sapio; Lauri Anttila; Mikko Valkama; Marilyn Wolf; Shuvra S. Bhattacharyya (AICAS, 2019)

MADS: A Framework for Design and Implementation of Adaptive Digital Predistortion Systems. - Lin Li 029; Peter Deaville; Adrian E. Sapio; Lauri Anttila; Mikko Valkama; Marilyn Wolf; Shuvra S. Bhattacharyya (IEEE J. Emerg. Sel. Topics Circuits Syst., 2019)

A Maximally Row-Parallel MRAM In-Memory-Computing Macro Addressing Readout Circuit Sensitivity and Area. - Peter Deaville; Bonan Zhang; Lung-Yen Chen; Naveen Verma (ESSDERC, 2021)

Statistical computing framework and demonstration for in-memory computing systems. - Bonan Zhang; Peter Deaville; Naveen Verma (DAC, 2022)

A 22nm 128-kb MRAM Row/Column-Parallel In-Memory Computing Macro with Memory-Resistance Boosting and Multi-Column ADC Readout. - Peter Deaville; Bonan Zhang; Naveen Verma (VLSI Technology and Circuits, 2022)

A 256-kb Fully Row/Column-parallel 22nm MRAM In-Memory-Computing Macro with Differential Readout for Robust Parallelization and Scale-up. - Peter Deaville; Bonan Zhang; Naveen Verma (ESSCIRC, 2023)

Compute SNR-boosted 22 nm MRAM-based In-memory Computing Macro using Statistical Error Compensation. - Saion K. Roy; Han-Mo Ou; Mostafa Gamal Ahmed; Peter Deaville; Bonan Zhang; Naveen Verma; Pavan Kumar Hanumolu; Naresh R. Shanbhag (ESSCIRC, 2023)

A Fully Row/Column-Parallel In-Memory Computing Macro in Foundry MRAM With Differential Readout for Noise Rejection. - Peter Deaville; Bonan Zhang; Naveen Verma (IEEE J. Solid State Circuits, 2024)

Compute SNDR-Boosted 22-nm MRAM-Based In-Memory Computing Macro Using Statistical Error Compensation. - Saion K. Roy; Han-Mo Ou; Mostafa Gamal Ahmed; Peter Deaville; Bonan Zhang; Naveen Verma; Pavan Kumar Hanumolu; Naresh R. Shanbhag (IEEE J. Solid State Circuits, 2025)

A Fully Row/Column-Parallel MRAM in-Memory Computing Macro With Memory-Resistance Boosting and Weighted Multi-Column ADC Readout. - Peter Deaville; Bonan Zhang; Naveen Verma (IEEE J. Solid State Circuits, 2025)