Maximal Rate Pipelined Solutions to Recurrance Problems. - Peter M. Kogge (ISCA, 1973)

A Parallel Algorithm for the Efficient Solution of a General Class of Recurrence Equations. - Peter M. Kogge; Harold S. Stone (IEEE Trans. Computers, 1973)

Parallel Solution of Recurrence Problems. - Peter M. Kogge (IBM J. Res. Dev., 1974)

The Microprogramming of Pipelined Processors. - Peter M. Kogge (ISCA, 1977)

Am Architectural Trail to Threaded-Code Systems. - Peter M. Kogge (Computer, 1982)

Function-based computing and parallelism: A review. - Peter M. Kogge (Parallel Comput., 1985)

VLSI and rule-based systems. - Peter M. Kogge; John V. Oldfield; Mark R. Brule; Charles D. Stormon (SIGARCH Comput. Archit. News, 1988)

Declarative Computing: A Technology Driver. - Peter M. Kogge (ARCS, 1992)

EXECUBE - A New Architecture for Scalable MPPs. - Peter M. Kogge (ICPP (1), 1994)

Preface. - Peter M. Kogge (IBM J. Res. Dev., 1994)

Combined DRAM and logic chip for massively parallel systems. - Peter M. Kogge; Toshio Sunaga; Hisatada Miyataka; Koji Kitamura; Eric Retter (ARVLSI, 1995)

Using Method Lookup Caches and Register Windowing to Speed Up Dynamically-Bound Object-Oriented Applications. - Kanad Ghose; Kiran Raghavendra Desai; Peter M. Kogge (EUROMICRO, 1996)

A parallel processing chip with embedded DRAM macros. - Toshio Sunaga; Hisatada Miyatake; Koji Kitamura; Peter M. Kogge; Eric Retter (IEEE J. Solid State Circuits, 1996)

Optimizing Data Scheduling on Processor-in-Memory Arrays. - Yi Tian; Edwin Hsing-Mean Sha; Chantana Chantrapornchai; Peter M. Kogge (IPPS/SPDP, 1998)

The energy complexity of register files. - Victor V. Zyuban; Peter M. Kogge (ISLPED, 1998)

Prototyping Execution Models for HTMT Petaflop Machine in Java. - Lilia Yerosheva; Peter M. Kogge (CANPC, 1999)

Logic in wire: using quantum dots to implement a microprocessor. - Michael T. Niemier; Peter M. Kogge (ICECS, 1999)

Microservers: a new memory semantics for massively parallel computing. - Jay B. Brockman; Peter M. Kogge; Thomas L. Sterling; Vincent W. Freeh; Shannon K. Kuntz (International Conference on Supercomputing, 1999)

Mapping Irregular Applications to DIVA, a PIM-based Data-Intensive Architecture. - Mary W. Hall; Peter M. Kogge; Jefferey G. Koller; Pedro C. Diniz; Jacqueline Chame; Jeff Draper; Jeff LaCoss; John J. Granacki; Jay B. Brockman; Apoorv Srivastava; William C. Athas; Vincent W. Freeh; et al. (SC, 1999)

Accelerating object-oriented applications using method lookup caches and register windowing. - Kanad Ghose; Kiran Raghavendra Desai; Peter M. Kogge (J. Syst. Archit., 1999)

Application of STD to latch-power estimation. - Victor V. Zyuban; Peter M. Kogge (IEEE Trans. Very Large Scale Integr. Syst., 1999)

A design of and design tools for a novel quantum dot based microprocessor. - Michael T. Niemier; Michael J. Kontz; Peter M. Kogge (DAC, 2000)

The Characterization of Data Intensive Memory Workloads on Distributed PIM Systems. - Richard C. Murphy; Peter M. Kogge; Arun Rodrigues (Intelligent Memory Systems, 2000)

Optimization of high-performance superscalar architectures for energy efficiency. - Victor V. Zyuban; Peter M. Kogge (ISLPED, 2000)

A Microserver View of HTMT. - Lilia Yerosheva; Shannon K. Kuntz; Peter M. Kogge; Jay B. Brockman (IPDPS, 2001)

Exploring and exploiting wire-level pipelining in emerging technologies. - Michael T. Niemier; Peter M. Kogge (ISCA, 2001)

Energy: efficient instruction dispatch buffer design for superscalar processors. - Gurhan Kucuk; Kanad Ghose; Dmitry Ponomarev 001; Peter M. Kogge (ISLPED, 2001)

Petaflop Computing for Protein Folding. - Shannon K. Kuntz; Richard C. Murphy; Michael T. Niemier; Jesús A. Izaguirre; Peter M. Kogge (PP, 2001)

Polygonal path approximation with angle constraints. - Danny Z. Chen; Ovidiu Daescu; John Hershberger 001; Peter M. Kogge; Jack Snoeyink (SODA, 2001)

Problems in designing with QCAs: Layout = Timing. - Michael T. Niemier; Peter M. Kogge (Int. J. Circuit Theory Appl., 2001)

Inherently Lower-Power High-Performance Superscalar Architectures. - Victor V. Zyuban; Peter M. Kogge (IEEE Trans. Computers, 2001)

Teaching students computer architecture for new, nanotechnologies. - Michael Thaddeus Niemier; Peter M. Kogge (WCAE, 2002)

Implications of a PIM Architectural Model for MPI. - Arun Rodrigues; Richard C. Murphy; Peter M. Kogge; Jay B. Brockman; Ron Brightwell; Keith D. Underwood (CLUSTER, 2003)

The State of State. - Peter M. Kogge (HPCA, 2003)

Bouncing Threads: Merging a New Execution Model into a Nanotechnology Memory. - Sarah E. Frost; Arun Rodrigues; Charles A. Giefer; Peter M. Kogge (ISVLSI, 2003)

From Bits to Chips: A Multidisciplinary Curriculum for Microelectronics System Design Education. - Gary H. Bernstein; Jay B. Brockman; Peter M. Kogge; Gregory L. Snider; Barbara E. Walvoord (MSE, 2003)

Energy-efficient issue queue design. - Dmitry V. Ponomarev; Gurhan Kucuk; Oguz Ergin; Kanad Ghose; Peter M. Kogge (IEEE Trans. Very Large Scale Integr. Syst., 2003)

Quantum-Dot Cellular Automata (QCA) circuit partitioning: problem modeling and solutions. - Dominic A. Antonelli; Danny Z. Chen; Timothy J. Dysart; Xiaobo Sharon Hu; Andrew B. Kahng; Peter M. Kogge; Richard C. Murphy; Michael T. Niemier (DAC, 2004)

Using Circuits and Systems-Level Research to Drive Nanotechnology. - Michael T. Niemier; Ramprasad Ravichandran; Peter M. Kogge (ICCD, 2004)

Characterizing a new class of threads in scientific applications for high end supercomputers. - Arun Rodrigues; Richard C. Murphy; Peter M. Kogge; Keith D. Underwood (ICS, 2004)

Cache implications of aggressively pipelined high performance microprocessors. - Timothy J. Dysart; Branden J. Moore; Lambert Schaelicke; Peter M. Kogge (ISPASS, 2004)

The "4-Diamond Circuit" - A Minimally Complex Nano-Scale Computational Building Block in QCA. - Michael T. Niemier; Peter M. Kogge (ISVLSI, 2004)

A low cost, multithreaded processing-in-memory system. - Jay B. Brockman; Shyamkumar Thoziyoor; Shannon K. Kuntz; Peter M. Kogge (WMPI, 2004)

Reversible computation with quantum-dot cellular automata (QCA). - Craig S. Lent; Sarah E. Frost; Peter M. Kogge (Conf. Computing Frontiers, 2005)

The implications of working set analysis on supercomputing memory hierarchy design. - Richard C. Murphy; Arun Rodrigues; Peter M. Kogge; Keith D. Underwood (ICS, 2005)

Generation of permutations for SIMD processors. - Alexei Kudriavtsev; Peter M. Kogge (LCTES, 2005)

Polygonal path simplification with angle constraints. - Danny Z. Chen; Ovidiu Daescu; John Hershberger 001; Peter M. Kogge; Ningfang Mi; Jack Snoeyink (Comput. Geom., 2005)

Fine-Grained Message Pipelining for Improved MPI Performance. - Arun Rodrigues; Kyle B. Wheeler; Peter M. Kogge; Keith D. Underwood (CLUSTER, 2006)

Facing up to the Inevitable: Intelligent Error Recovery in Massively Parallel Processing in Memory Architectures. - James F. Kramer; Matthias Scheutz; Jay B. Brockman; Peter M. Kogge (PDPTA, 2006)

M06 - Issues for the future of supercomputing: impact of Moore's law and architecture on application performance. - Erik DeBenedictis; David E. Keyes; Peter M. Kogge (SC, 2006)

Poster reception - The structural simulation toolkit: exploring novel architectures. - Arun Rodrigues; Richard C. Murphy; Peter M. Kogge; Keith D. Underwood (SC, 2006)

Multi-core issues - Multi-Core for HPC: breakthrough or breakdown? - Thomas L. Sterling; Peter M. Kogge; William J. Dally; Steve Scott; William Gropp; David E. Keyes; Peter H. Beckman (SC, 2006)

General floorplan for reversible quantum-dot cellular automata. - Sarah E. Murphy; Erik DeBenedictis; Peter M. Kogge (Conf. Computing Frontiers, 2007)

Probabilistic Analysis of a Molecular Quantum-Dot Cellular Automata Adder. - Timothy J. Dysart; Peter M. Kogge (DFT, 2007)

A Heterogeneous Lightweight Multithreaded Architecture. - Sheng Li 007; Amit Kashyap; Shannon K. Kuntz; Jay B. Brockman; Peter M. Kogge; Paul L. Springer; Gary Block (IPDPS, 2007)

Evaluating synchronization techniques for light-weight multithreaded/multicore architectures. - Srinivas Sridharan 002; Arun Rodrigues; Peter M. Kogge (SPAA, 2007)

On the Memory Access Patterns of Supercomputer Applications: Benchmark Selection and Its Implications. - Richard C. Murphy; Peter M. Kogge (IEEE Trans. Computers, 2007)

Design of a mask-programmable memory/multiplier array using G4-FET technology. - Jay B. Brockman; Sheng Li 007; Peter M. Kogge; Amit Kashyap; Mohammad M. Mojarradi (DAC, 2008)

System Reliabilities When Using Triple Modular Redundancy in Quantum-Dot Cellular Automata. - Timothy J. Dysart; Peter M. Kogge (DFT, 2008)

Memory model effects on application performance for a lightweight multithreaded architecture. - Sheng Li 007; Shannon K. Kuntz; Peter M. Kogge; Jay B. Brockman (IPDPS, 2008)

The Challenges of Petascale Architectures. - Peter M. Kogge (Comput. Sci. Eng., 2009)

Organizing wires for reliability in magnetic QCA. - Timothy J. Dysart; Peter M. Kogge (ACM J. Emerg. Technol. Comput. Syst., 2009)

Analyzing the Inherent Reliability of Moderately Sized Magnetic and Electrostatic QCA Circuits Via Probabilistic Transfer Matrices. - Timothy J. Dysart; Peter M. Kogge (IEEE Trans. Very Large Scale Integr. Syst., 2009)

Models for generating locality-tuned traveling threads for a hierarchical multi-level heterogeneous multicore. - Patrick Anthony La Fratta; Peter M. Kogge (Conf. Computing Frontiers, 2010)

Modeling bounds on migration overhead for a traveling thread architecture. - Patrick Anthony La Fratta; Peter M. Kogge (IPDPS Workshops, 2010)

Exploring the Possible Past Futures of a Single Part Type Multi-core PIM Chip. - Peter M. Kogge (IWIA, 2010)

Facing the Exascale Energy Wall. - Peter M. Kogge; Patrick Anthony La Fratta; Megan Vance (IWIA, 2010)

High throughput and low power dissipation in QCA pipelines using Bennett clocking. - Marco Ottavi; Salvatore Pontarelli; Erik DeBenedictis; Adelio Salsano; Peter M. Kogge; Fabrizio Lombardi (NANOARCH, 2010)

Introducing mNUMA: an extended PGAS architecture. - Megan Vance; Peter M. Kogge (PGAS, 2010)

Recomposing an Irregular Algorithm Using a Novel Low-Level PGAS Model. - Megan Cason; Peter M. Kogge (ICPP Workshops, 2011)

Using the TOP500 to trace and project technology and architecture trends. - Peter M. Kogge; Timothy J. Dysart (SC, 2011)

Lightweight Chip Multi-Threading (LCMT): Maximizing Fine-Grained Parallelism On-Chip. - Sheng Li 007; Shannon K. Kuntz; Jay B. Brockman; Peter M. Kogge (IEEE Trans. Parallel Distributed Syst., 2011)

Big data, deep data, and the effect of system architectures on performance. - Peter M. Kogge (CTS, 2013)

Comparative performance analysis of a Big Data NORA problem on a variety of architectures. - Peter M. Kogge; David A. Bayliss (CTS, 2013)

Exascale Computing Trends: Adjusting to the "New Normal"' for Computer Architecture. - Peter M. Kogge; John Shalf (Comput. Sci. Eng., 2013)

Energy-efficient multithreading for a hierarchical heterogeneous multicore through locality-cognizant thread generation. - Patrick Anthony La Fratta; Peter M. Kogge (J. Parallel Distributed Comput., 2013)

Reading the Tea-Leaves: How Architecture Has Evolved at the High End. - Peter M. Kogge (IPDPS, 2014)

Updating the Energy Model for Future Exascale Systems. - Peter M. Kogge (ISC, 2015)

Molecular cellular networks: A non von Neumann architecture for molecular electronics. - Craig S. Lent; Kenneth W. Henderson; S. Alex Kandel; Steven A. Corcelli; Gregory L. Snider; Alexei O. Orlov; Peter M. Kogge; Michael T. Niemier; Ryan C. Brown; John A. Christie; Natalie A. Wasio; Rebecca C. Quardokus; et al. (ICRC, 2016)

Jaccard Coefficients as a Potential Graph Benchmark. - Peter M. Kogge (IPDPS Workshops, 2016)

ParLearning 2016 Keynote. - Peter M. Kogge (IPDPS Workshops, 2016)

Highly Scalable Near Memory Processing with Migrating Threads on the Emu System Architecture. - Timothy J. Dysart; Peter M. Kogge; Martin M. Deneroff; Eric Bovell; Preston Briggs; Jay B. Brockman; Kenneth Jacobsen; Yujen Juan; Shannon K. Kuntz; Richard A. Lethin; Janice O. McMahon; Chandra Pawar; et al. (IA3@SC, 2016)

Graph Analytics: Complexity, Scalability, and Architectures. - Peter M. Kogge (IPDPS Workshops, 2017)

A Case for Migrating Execution for Irregular Applications. - Peter M. Kogge; Shannon K. Kuntz (IA3@SC, 2017)

Implementing the Jaccard Index on the Migratory Memory-Side Processing Emu Architecture. - Géraud Krawezik; Peter M. Kogge; Timothy J. Dysart; Shannon K. Kuntz; Janice O. McMahon (HPEC, 2018)

Optimizing for KNL Usage Modes When Data Doesn't Fit in MCDRAM. - Neil Butcher; Stephen L. Olivier; Jonathan W. Berry; Simon D. Hammond; Peter M. Kogge (ICPP, 2018)

Scalability of Hybrid Sparse Matrix Dense Vector (SpMV) Multiplication. - Brian A. Page; Peter M. Kogge (HPCS, 2018)

Multi-threading Semantics for Highly Heterogeneous Systems Using Mobile Threads. - Peter M. Kogge (HPCS, 2019)

Introducing Streaming into Linear Algebra-based Sparse Graph Algorithms. - Peter M. Kogge; Neil A. Butcher; Brian A. Page (HPCS, 2019)

Scalability of Hybrid SpMV on Intel Xeon Phi Knights Landing. - Brian A. Page; Peter M. Kogge (HPCS, 2019)

Application Performance of Physical System Simulations. - Vladimir Getov; Peter M. Kogge; Thomas M. Conte (PARCO, 2019)

GrowHON: A Scalable Algorithm for Growing Higher-order Networks of Sequences. - Steven J. Krieg; Peter M. Kogge; Nitesh V. Chawla (COMPLEX NETWORKS (2), 2020)

Implementing Sparse Linear Algebra Kernels on the Lucata Pathfinder-A Computer. - Géraud Krawezik; Shannon K. Kuntz; Peter M. Kogge (HPEC, 2020)

Scalability of Streaming on Migrating Threads. - Brian A. Page; Peter M. Kogge (HPEC, 2020)

Machine Learning Algorithm Performance on the Lucata Computer. - Paul L. Springer; Thomas Schibler; Géraud Krawezik; Jack Lightholder; Peter M. Kogge (HPEC, 2020)

Scalability of Sparse Matrix Dense Vector Multiply (SpMV) on a Migrating Thread Architecture. - Brian A. Page; Peter M. Kogge (IPDPS Workshops, 2020)

Cache Oblivious Strategies to Exploit Multi-Level Memory on Manycore Systems. - Neil A. Butcher; Stephen L. Olivier; Peter M. Kogge (MCHPC@SC, 2020)

Locality: The 3rd Wall and the Need for Innovation in Parallel Architectures. - Peter M. Kogge; Brian A. Page (ARCS, 2021)

Exploring Strategies to Improve Locality Across Many-Core Affinities. - Neil Butcher; Peter M. Kogge (Euro-Par Workshops, 2021)

Deluge: Achieving Superior Efficiency, Throughput, and Scalability with Actor Based Streaming on Migrating Threads. - Brian A. Page; Peter M. Kogge (HPEC, 2021)

Greatly Accelerated Scaling of Streaming Problems with A Migrating Thread Architecture. - Brian A. Page; Peter M. Kogge (IA3@SC, 2021)

Passel: Improved Scalability and Efficiency of Distributed SVM using a Cacheless PGAS Migrating Thread Architecture. - Brian A. Page; Peter M. Kogge (ScalA@SC, 2021)

Scalability of Streaming Anomaly Detection in an Unbounded Key Space Using Migrating Threads. - Brian A. Page; Peter M. Kogge (ISC, 2021)

Frontier vs the Exascale Report: Why so long? and Are We Really There Yet? - Peter M. Kogge; William J. Dally (PMBS@SC, 2022)

The Evolution of a New Model of Computation. - Brian A. Page; Peter M. Kogge (IA3@SC, 2022)

Improving Quantum Classifier Performance in NISQ Computers by Voting Strategy from Ensemble Learning. - Ruiyang Qin; Zhiding Liang; Jinglei Cheng; Peter M. Kogge; Yiyu Shi 001 (CoRR, 2022)

HCW 2023 Keynote Heterogeneity and the Problem that Shall Not Be Named. - Peter M. Kogge (IPDPS Workshops, 2023)

Hunting the Needle - The Potential of Innovation in Architecture. - Peter M. Kogge; Janice O. McMahon; Timothy J. Dysart (HPEC, 2024)

RIMR: Reverse Influence Maximization Rank. - Jay Vap; Peter M. Kogge (IPDPS (Workshops), 2024)

Scaling of Graph Embedding for Quantum Annealers. - Ulrik De Muelenaere; Allison O'Brien; Kelly Williams; Peter M. Kogge (QCE, 2024)