A circuit level hot-carrier evaluation system. - Paul G. Y. Tsui; Peter M. Lee; Frank K. Baker; James D. Hayden; Lee Howington; Tom Tiwald; Brian Mowry (IEEE J. Solid State Circuits, 1991)

An efficient method of applying hot-carrier reliability simulation to logic design. - Hisuko Sato; Mariko Ohtsuka; Kazumasa Yanagisawa; Peter M. Lee (CICC, 2001)

A Parallel and Accelerated Circuit Simulator with Precise Accuracy. - Peter M. Lee; Shinji Ito; Takeaki Hashimoto; Junji Sato; Tomomasa Touma; Goichi Yokomizo (ASP-DAC/VLSI Design, 2002)