Vorwort Reichel. - Peter Reichel (Elektrotech. Informationstechnik, 2006)

Secure, Real-Time and Multi-Threaded General-Purpose Embedded Java Microarchitecture. - Martin Zabel; Thomas B. Preußer; Peter Reichel; Rainer G. Spallek (DSD, 2007)

GePaRD - A High-Level Generation Flow for Partially Reconfigurable Designs. - Maik Boden; Thomas Fiebig; Markus Reiband; Peter Reichel; Steffen Rülke (ISVLSI, 2008)

An Embedded GC Module with Support for Multiple Mutators and Weak References. - Thomas B. Preußer; Peter Reichel; Rainer G. Spallek (ARCS, 2010)

Herbert Haidvogl zum CIRED DC Chairman gewählt. - Peter Reichel (Elektrotech. Informationstechnik, 2011)

Out of the wireless access bottleneck trap: technologies, economics, regulation and standardization perspectives. - Wolfgang Reichl; Peter Reichl; Peter Reichel (Elektrotech. Informationstechnik, 2012)

Hardware/software infrastructure for ASIC commissioning and rapid system prototyping. - Peter Reichel; Jens Döge (ReConFig, 2014)

Simulation environment for a vision-system-on-chip with integrated processing. - Peter Reichel; Christoph Hoppe; Jens Döge; Nico Peter (ICDSC, 2015)

An ASIP-based control system for Vision Chips with highly parallel signal processing. - Peter Reichel; Jens Döge; Nico Peter; Christoph Hoppe; Andreas Reichel (ISIE, 2015)

Software Environment for Holistic Vision-System-on-Chip Programming. - Peter Reichel; Jens Döge; Nico Peter; Christoph Hoppe; Andreas Reichel; Peter Schneider (IMSE, 2016)

Simulation platform for application development on a vision-system-on-chip with integrated signal processing. - Peter Reichel; Jens Döge; Christoph Hoppe; Nico Peter; Andreas Reichel; Peter Schneider (J. Electronic Imaging, 2016)

Implementation of an asynchronous bundled-data router for a GALS NoC in the context of a VSoC. - Patrick Russell; Jens Döge; Christoph Hoppe; Thomas B. Preußer; Peter Reichel; Peter Schneider (DDECS, 2017)

Effizienter Einsatz von Bildsensoren mit integrierter Signalverarbeitung - Peter Reichel (2017)

A High Speed Asynchronous Multi Input Pipeline for Compaction and Transfer of Parallel SIMD Data. - Christoph Hoppe; Jens Döge; Peter Reichel; Patrick Russell; Andreas Reichel; Peter Schneider (ASYNC, 2018)

Live Demonstration: Hitting a Table Tennis Ball with a Programmable Vision-System-on-Chip. - Jens Döge; Christoph Hoppe; Andreas Reichel; Peter Reichel; Nico Peter; Holger Priwitzer (ISCAS, 2018)

Low-Latency Image Acquisition and Processing with a Programmable Vision-System-on-Chip. - Jens Döge; Christoph Hoppe; Andreas Reichel; Peter Reichel; Nico Peter; Holger Priwitzer (ISCAS, 2018)

Flexible Multi-Channel Analog-Frontend for Ultra-Low Power Environmental Sensing. - Marcel Jotschke; Peter Reichel; Wilmar Carvajal Ossa; Jeongwook Koh; Torsten Reich; Christian Mayr 001 (IEEE Open J. Circuits Syst., 2021)

Vorwort. - Peter Reichel (Elektrotech. Informationstechnik, 2022)

Increasing the Robustness of TERO-TRNGs Against Process Variation. - Christian Skubich; Peter Reichel; Marc Reichenbach (ACM Trans. Reconfigurable Technol. Syst., 2023)

Electromagnetic interference and the effect of low-voltage protective measures at electric vehicle charging stations. - Martin Fürnschuß; Daniel Herbst; Peter Reichel; Daniel Stahleder; Christian Auer; Ernst Schmautzer; Robert Schürhuber (Elektrotech. Informationstechnik, 2023)

A Structured Approach for Embedded Memory Integration of Emerging Memory Technologies. - Stefan Pechmann; Thorsten Spätling; Peter Reichel; Roland Müller; Amelie Hagelauer (LASCAS, 2024)

Fully-Integrated Differential RRAM Cell Designs with Multi-Level Capability and Enhanced Read Margin. - Stefan Pechmann; Peter Reichel; Thorsten Spätling; Amelie Hagelauer (ISCAS, 2025)