Architecture and Circuit Choices for 5G Millimeter-Wave Beamforming Transceivers. - Peter Sagazio; Steven Callender; Woorim Shin; Oner Orhan; Stefano Pellerano; Christopher D. Hull (IEEE Commun. Mag., 2018)

A Scalable 71-to-76GHz 64-Element Phased-Array Transceiver Module with 2×2 Direct-Conversion IC in 22nm FinFET CMOS Technology. - Stefano Pellerano; Steven Callender; Woorim Shin; Yanjie Wang; Somnath Kundu; Abhishek Agrawal; Peter Sagazio; Brent R. Carlton; Farhana Sheikh; Arnaud Amadjikpe; William J. Lambert; Divya Shree Vemparala; et al. (ISSCC, 2019)

A Fully Integrated 160Gb/s D-Band Transmitter with 1.1 pJ/b Efficiency in 22nm FinFET Technology. - Steven Callender; Amy Whitcombe; Abhishek Agrawal; Ritesh Bhat; Mustafijur Rahman; Chun C. Lee; Peter Sagazio; Georgios C. Dogiamis; Brent R. Carlton; Mark Chakravorti; Stefano Pellerano; Christopher D. Hull (ISSCC, 2022)

A 6.0mW 3.8GS/s 7b VTC/TDC-Assisted Interleaved SAR ADC with 13GHz ERBW. - Amy Whitcombe; Chun C. Lee; Asma Kuriparambil Thekkumpate; Somnath Kundu; Jaykant Timbadiya; Abhishek Agrawal; Brent R. Carlton; Peter Sagazio; Stefano Pellerano; Christopher D. Hull (VLSI Technology and Circuits, 2022)

A Fully Integrated 160-Gb/s D-Band Transmitter Achieving 1.1-pJ/b Efficiency in 22-nm FinFET. - Steven Callender; Abhishek Agrawal; Amy Whitcombe; Ritesh Bhat; Mustafijur Rahman; Chun C. Lee; Peter Sagazio; Georgios C. Dogiamis; Brent R. Carlton; Christopher D. Hull; Stefano Pellerano (IEEE J. Solid State Circuits, 2022)

A 128Gb/s 1.95pJ/b D-Band Receiver with Integrated PLL and ADC in 22nm FinFET. - Abhishek Agrawal; Amy Whitcombe; Woorim Shin; Ritesh Bhat; Somnath Kundu; Peter Sagazio; Hariprasad Chandrakumar; Thomas William Brown; Brent R. Carlton; Christopher D. Hull; Steven Callender; Stefano Pellerano (ISSCC, 2023)

A VTC/TDC-Assisted 4× Interleaved 3.8 GS/s 7b 6.0 mW SAR ADC With 13 GHz ERBW. - Amy Whitcombe; Chun C. Lee; Asma Kuriparambil Thekkumpate; Somnath Kundu; Jaykant Timbadiya; Abhishek Agrawal; Brent R. Carlton; Peter Sagazio; Stefano Pellerano; Christopher D. Hull (IEEE J. Solid State Circuits, 2023)

A 128-Gb/s D-Band Receiver With Integrated PLL and ADC Achieving 1.95-pJ/b Efficiency in 22-nm FinFET. - Abhishek Agrawal; Amy Whitcombe; Woorim Shin; Ritesh Bhat; Somnath Kundu; Peter Sagazio; Hariprasad Chandrakumar; Thomas William Brown; Brent R. Carlton; Christopher Dennis Hull; Steven Callender; Stefano Pellerano (IEEE J. Solid State Circuits, 2023)