3D rendering using FPGAs. - Péter Szántó; Béla Fehér (VLSI-SOC, 2003)

High performance visibility testing with screen segmentation. - Péter Szántó; Béla Fehér (ESTIMedia, 2004)

High-Performance Timing-Driven Rank Filter. - Péter Szántó; Gábor Szedö; Béla Fehér (VLSI Design, 2008)

Energy-efficient AI at the Edge. - Péter Szántó; Tamás Kiss; Károly János Sipos (MECO, 2022)