ESCAPE: environment for the simulation of computer architectures for the purpose of education. - Jan Van Campenhout; Peter Verplaetse; Henk Neefs (WCAE@ISCA, 1998)

Towards synthetic benchmark circuits for evaluating timing-driven CAD tools. - Dirk Stroobandt; Peter Verplaetse; Jan Van Campenhout (ISPD, 1999)

On synthetic benchmark generation methods. - Peter Verplaetse; Jan Van Campenhout; Dirk Stroobandt (ISCAS, 2000)

Generating synthetic benchmark circuits for evaluating CAD tools. - Dirk Stroobandt; Peter Verplaetse; Jan M. Van Campenhout (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000)

Refinements of Rent's Rule Allowing Accurate Interconnect Complexity Modeling. - Peter Verplaetse (ISQED, 2001)

On rent's rule for rectangular regions. - Joni Dambre; Peter Verplaetse; Dirk Stroobandt; Jan Van Campenhout (SLIP, 2001)

On partitioning vs. placement rent properties. - Peter Verplaetse; Joni Dambre; Dirk Stroobandt; Jan Van Campenhout (SLIP, 2001)

A stochastic model for the interconnection topology of digital circuits. - Peter Verplaetse; Dirk Stroobandt; Jan M. Van Campenhout (IEEE Trans. Very Large Scale Integr. Syst., 2001)

Getting more out of Donath's hierarchical model for interconnect prediction. - Joni Dambre; Peter Verplaetse; Dirk Stroobandt; Jan Van Campenhout (SLIP, 2002)

Hardware implementation of an EAN-13 bar code decoder. - Jeroen De Maeyer; Harald Devos; Wim Meeus; Peter Verplaetse; Dirk Stroobandt (ASP-DAC, 2003)

A comparison of various terminal-gate relationships for interconnect prediction in VLSI circuits. - Joni Dambre; Peter Verplaetse; Dirk Stroobandt; Jan Van Campenhout (IEEE Trans. Very Large Scale Integr. Syst., 2003)