TIDBITS: Speedup Via Time-Delay Bit-Slicing in ALU Design for VLSI Technology. - Peter Y.-T. Hsu; Joseph T. Rahmeh; Edward S. Davidson; Jacob A. Abraham (ISCA, 1985)

Highly Concurrent Scalar Processing. - Peter Y.-T. Hsu; Edward S. Davidson (ISCA, 1986)

Overlapped Loop Support in the Cydra 5. - James C. Dehnert; Peter Y.-T. Hsu; Joseph P. Bratt (ASPLOS, 1989)

Appucations Development On the Very Long Instruction Word Cydra-5. - Peter Y.-T. Hsu; B. Ramakrishna Rau; K. J. M. Moriarty (Int. J. High Perform. Comput. Appl., 1989)