Memory-Cordie Algorithm for Embedded Programmable Logic Device Designs. - Xianwei Wu; Phaisit Chewputtanagul; David Jeff Jackson; Tim A. Haskew (CATA, 2002)

Implementation and Performance Evaluation of Intel VTUNE Image Processing Functions in the MATLAB Environment. - Phaisit Chewputtanagul; David Jeff Jackson; Kenneth G. Ricks (CATA, 2003)

A Programmable Logic-Based Implementation of Ultra-Fast Parallel Binary Image Morphological Operations. - Songpol Ongwattanakul; Phaisit Chewputtanagul; David Jeff Jackson; Kenneth G. Ricks (CATA, 2003)

Scalable giga-pixels/s binary image morphological operations. - Songpol Ongwattanakul; Phaisit Chewputtanagul; David Jeff Jackson; Kenneth G. Ricks (ISCAS (2), 2003)

Quaternary Arithmetic Logic Unit on a Programmable Logic Device. - Songpol Ongwattanakul; Phaisit Chewputtanagul; David Jeff Jackson; Kenneth G. Ricks (PDPTA, 2003)

A Novel Hardware Architecture for Scalable Binary Morphological and Mask-Based Image Processing. - David Jeff Jackson; Songpol Ongwattanakul; Phaisit Chewputtanagul; Kenneth G. Ricks; William A. Stapleton (Int. J. Comput. Their Appl., 2007)