Towards low area overhead ARQ based soft error tolerant data paths for SRAM-based Altera FPGAs. - Phani Balaji Swamy Tangellapalli; Syed Rafay Hasan (MWSCAS, 2012)

Soft error aware pipelined architecture: Leveraging automatic repeat request protocol. - Phani Balaji Swamy Tangellapalli; Syed Rafay Hasan (MWSCAS, 2013)

Area efficient soft error tolerant RISC pipeline: Leveraging data encoding and inherent ALU redundancy. - Syed Rafay Hasan; Phani Tangellapalli (MWSCAS, 2017)