Logically Synthesized, Hardware-Accelerated, Restricted Boltzmann Machines for Combinatorial Optimization and Integer Factorization. - Saavan Patel; Philip Canoza; Sayeef S. Salahuddin (CoRR, 2020)

Ising Model Optimization Problems on a FPGA Accelerated Restricted Boltzmann Machine. - Saavan Patel; Lili Chen; Philip Canoza; Sayeef S. Salahuddin (CoRR, 2020)

PASS: An Asynchronous Probabilistic Processor for Next Generation Intelligence. - Saavan Patel; Philip Canoza; Adhiraj Datar; Steven Lu; Chirag Garg; Sayeef S. Salahuddin (CoRR, 2024)