A 24GS/s 6b ADC in 90nm CMOS. - Peter Schvan; Jérôme Bach; Chris Falt; Philip Flemke; Robert Gibbins; Yuriy M. Greshishchev; Naim Ben-Hamida; Daniel Pollex; John Sitch; Shing-Chi Wang; John Wolczanski (ISSCC, 2008)

Clock recovery for a 40 Gb/s QPSK optical receiver. - Naim Ben-Hamida; John Sitch; Philip Flemke; Daniel Pollex; Peter Schvan; Yuriy M. Greshishchev; Shing-Chi Wang; Chris Falt (ICECS, 2009)

A 40GS/s 6b ADC in 65nm CMOS. - Yuriy M. Greshishchev; Jorge Aguirre; Marinette Besson; Robert Gibbins; Chris Falt; Philip Flemke; Naim Ben-Hamida; Daniel Pollex; Peter Schvan; Shing-Chi Wang (ISSCC, 2010)

A 56GS/S 6b DAC in 65nm CMOS with 256×6b memory. - Yuriy M. Greshishchev; Daniel Pollex; Shing-Chi Wang; Marinette Besson; Philip Flemeke; Stefan Szilagyi; Jorge Aguirre; Chris Falt; Naim Ben-Hamida; Robert Gibbins; Peter Schvan (ISSCC, 2011)