Philip H. W. Leong

Affiliations:
  • University of Sydney, Australia


According to our database1, Philip H. W. Leong authored at least 194 papers between 1991 and 2024.

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Bibliography

2024
S$^{3}$CA: A Sparse Strip Spectral Correlation Analyzer.
IEEE Signal Process. Lett., 2024

2023
Predicting dynamic spectrum allocation: a review covering simulation, modelling, and prediction.
Artif. Intell. Rev., October, 2023

fSEAD: A Composable FPGA-based Streaming Ensemble Anomaly Detection Library.
ACM Trans. Reconfigurable Technol. Syst., September, 2023

Fixed-point FPGA Implementation of the FFT Accumulation Method for Real-time Cyclostationary Analysis.
ACM Trans. Reconfigurable Technol. Syst., September, 2023

Performance Analysis and Optimal Design of BATS Code: A Hardware Perspective.
IEEE Trans. Veh. Technol., August, 2023

A Scalable Systolic Accelerator for Estimation of the Spectral Correlation Density Function and Its FPGA Implementation.
ACM Trans. Reconfigurable Technol. Syst., March, 2023

BOOST: Block Minifloat-Based On-Device CNN Training Accelerator with Transfer Learning.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

The Wyner Variational Autoencoder for Unsupervised Multi-Layer Wireless Fingerprinting.
Proceedings of the IEEE Global Communications Conference, 2023

Single-Batch CNN Training using Block Minifloats on FPGAs.
Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2023

2022
FPGA Architecture Exploration for DNN Acceleration.
ACM Trans. Reconfigurable Technol. Syst., 2022

Rethinking Embedded Blocks for Machine Learning Applications.
ACM Trans. Reconfigurable Technol. Syst., 2022

Introduction to Special Section on FPGA 2021.
ACM Trans. Reconfigurable Technol. Syst., 2022

NITI: Training Integer Neural Networks Using Integer-Only Arithmetic.
IEEE Trans. Parallel Distributed Syst., 2022

On-Device Saliency Prediction Based on Pseudoknowledge Distillation.
IEEE Trans. Ind. Informatics, 2022

Wireless Signal Representation Techniques for Automatic Modulation Classification.
IEEE Access, 2022

FPGA Implementation of N-BEATS for Time Series Forecasting Using Block Minifloat Arithmetic.
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022

2021
A Block Minifloat Representation for Training Deep Neural Networks.
Proceedings of the 9th International Conference on Learning Representations, 2021

APIR-DSP: An approximate PIR-DSP architecture for error-tolerant applications.
Proceedings of the International Conference on Field-Programmable Technology, 2021

MLBlocks: FPGA Blocks for Machine Learning Applications.
Proceedings of the FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28, 2021

2020
AddNet: Deep Neural Networks Using FPGA-Optimized Multipliers.
IEEE Trans. Very Large Scale Integr. Syst., 2020

Kernel Normalised Least Mean Squares with Delayed Model Adaptation.
ACM Trans. Reconfigurable Technol. Syst., 2020

Nonlinear retinal response modeling for future neuromorphic instrumentation.
IEEE Instrum. Meas. Mag., 2020

Vision Guided Crop Detection in Field Robots using FPGA-Based Reconfigurable Computers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Real-time Automatic Modulation Classification using RFSoC.
Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium Workshops, 2020

LUXOR: An FPGA Logic Cell Architecture for Efficient Compressor Tree Implementations.
Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

2019
A Two-Speed, Radix-4, Serial-Parallel Multiplier.
IEEE Trans. Very Large Scale Integr. Syst., 2019

Unrolling Ternary Neural Networks.
ACM Trans. Reconfigurable Technol. Syst., 2019

RNA: An Accurate Residual Network Accelerator for Quantized and Reconstructed Deep Neural Networks.
IEICE Trans. Inf. Syst., 2019

Real-Time Automatic Modulation Classification.
Proceedings of the International Conference on Field-Programmable Technology, 2019

MajorityNets: BNNs Utilising Approximate Popcount for Improved Efficiency.
Proceedings of the International Conference on Field-Programmable Technology, 2019

Training Deep Neural Networks in Low-Precision with High Accuracy Using FPGAs.
Proceedings of the International Conference on Field-Programmable Technology, 2019

PIR-DSP: An FPGA DSP Block Architecture for Multi-precision Deep Neural Networks.
Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

2018
A Structured Sparse Subspace Learning Algorithm for Anomaly Detection in UAV Flight Data.
IEEE Trans. Instrum. Meas., 2018

An Unsupervised Deep Hyperspectral Anomaly Detector.
Sensors, 2018

Long Short-Term Memory for Radio Frequency Spectral Prediction and its Real-Time FPGA Implementation.
Proceedings of the 2018 IEEE Military Communications Conference, 2018

Feature Analysis for Discrimination of Motor Unit Action Potentials.
Proceedings of the 12th International Symposium on Medical Information and Communication Technology, 2018

Real-time FPGA-based Anomaly Detection for Radio Frequency Signals.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Kibo: An Open-Source Fixed-Point Tool-kit for Training and Inference in FPGA-Based Deep Learning Networks.
Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium Workshops, 2018

Simultaneous Inference and Training Using On-FPGA Weight Perturbation Techniques.
Proceedings of the International Conference on Field-Programmable Technology, 2018

RNA: An Accurate Residual Network Accelerator for Quantized and Reconstructed Deep Neural Networks.
Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

Customizing Low-Precision Deep Neural Networks for FPGAs.
Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

A Customizable Matrix Multiplication Framework for the Intel HARPv2 Xeon+FPGA Platform: A Deep Learning Case Study.
Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018

FPGA Fastfood - A High Speed Systolic Implementation of a Large Scale Online Kernel Method.
Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018

SYQ: Learning Symmetric Quantization for Efficient Deep Neural Networks.
Proceedings of the 2018 IEEE Conference on Computer Vision and Pattern Recognition, 2018

Redundancy-Reduced MobileNet Acceleration on Reconfigurable Logic for ImageNet Classification.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2018

Accuracy to Throughput Trade-Offs for Reduced Precision Neural Networks on Reconfigurable Logic.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2018

2017
Lossless Compression Decoders for Bitstreams and Software Binaries Based on High-Level Synthesis.
IEEE Trans. Very Large Scale Integr. Syst., 2017

The First 25 Years of the FPL Conference: Significant Papers.
ACM Trans. Reconfigurable Technol. Syst., 2017

FPGA Implementations of Kernel Normalised Least Mean Squares Processors.
ACM Trans. Reconfigurable Technol. Syst., 2017

On Time Series Forecasting Error Measures for Finite Horizon Control.
IEEE Trans. Control. Syst. Technol., 2017

Respiratory Artefact Removal in Forced Oscillation Measurements: A Machine Learning Approach.
IEEE Trans. Biomed. Eng., 2017

Freezing of Gait Detection in Parkinson's Disease: A Subject-Independent Detector Using Anomaly Scores.
IEEE Trans. Biomed. Eng., 2017

A Hybrid CMOS-Memristor Neuromorphic Synapse.
IEEE Trans. Biomed. Circuits Syst., 2017

An enhanced MOSFET threshold voltage model for the 6-300 K temperature range.
Microelectron. Reliab., 2017

Forecasting Financial Time Series with Grammar-Guided Feature Generation.
Comput. Intell., 2017

Compressing Low Precision Deep Neural Networks Using Sparsity-Induced Regularization in Ternary Networks.
Proceedings of the Neural Information Processing - 24th International Conference, 2017

An anomaly detection technique in wearable wireless monitoring systems for studies of gait freezing in Parkinson's disease.
Proceedings of the 2017 International Conference on Information Networking, 2017

Wearable healthcare systems: A single channel accelerometer based anomaly detector for studies of gait freezing in Parkinson's disease.
Proceedings of the IEEE International Conference on Communications, 2017

Scaling Binarized Neural Networks on Reconfigurable Logic.
Proceedings of the 8th Workshop and 6th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms, 2017

High performance binary neural networks on the Xeon+FPGA™ platform.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

FINN: A Framework for Fast, Scalable Binarized Neural Network Inference.
Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2017

2016
A Microcoded Kernel Recursive Least Squares Processor Using FPGA Technology.
ACM Trans. Reconfigurable Technol. Syst., 2016

Adapting content-based image retrieval techniques for the semantic annotation of medical images.
Comput. Medical Imaging Graph., 2016

Feature Engineering and Supervised Learning Classifiers for Respiratory Artefact Removal in Lung Function Tests.
Proceedings of the 2016 IEEE Global Communications Conference, 2016

Random projections for scaling machine learning on FPGAs.
Proceedings of the 2016 International Conference on Field-Programmable Technology, 2016

A Scalable Dataflow Accelerator for Real Time Onboard Hyperspectral Image Classification.
Proceedings of the Applied Reconfigurable Computing - 12th International Symposium, 2016

2015
MCALIB: Measuring Sensitivity to Rounding Error with Monte Carlo Programming.
ACM Trans. Program. Lang. Syst., 2015

Phase recovery for time of arrival estimation in the presence of interference.
Proceedings of the 2015 IEEE International Conference on Acoustics, 2015

Distributed kernel learning using Kernel Recursive Least Squares.
Proceedings of the 2015 IEEE International Conference on Acoustics, 2015

Braiding: A scheme for resolving hazards in kernel adaptive filters.
Proceedings of the 2015 International Conference on Field Programmable Technology, 2015

UniStream: A unified stream architecture combining configuration and data processing.
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

Significant papers from the first 25 years of the FPL conference.
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

A fully pipelined kernel normalised least mean squares processor for accelerated parameter optimisation.
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

Technology Scaling in FPGAs: Trends in Applications and Architectures.
Proceedings of the 23rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2015

An online algorithm for least-square spectral analysis: Applied to time-frequency analysis of heart rate.
Proceedings of the 37th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2015

Convolutional Neural Networks for Subfigure Classification.
Proceedings of the Working Notes of CLEF 2015, 2015

Convolutional Neural Networks for Medical Clustering.
Proceedings of the Working Notes of CLEF 2015, 2015

2014
Rolling window time series prediction using MapReduce.
Proceedings of the 15th IEEE International Conference on Information Reuse and Integration, 2014

RAW Introduction and Committees.
Proceedings of the 2014 IEEE International Parallel & Distributed Processing Symposium Workshops, 2014

Design space exploration for FPGA-based hybrid multicore architecture.
Proceedings of the 2014 International Conference on Field-Programmable Technology, 2014

An FPGA-based spectral anomaly detection system.
Proceedings of the 2014 International Conference on Field-Programmable Technology, 2014

SMCGen: Generating Reconfigurable Design for Sequential Monte Carlo Applications.
Proceedings of the 22nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2014

Unsupervised discrimination of motor unit action potentials using spectrograms.
Proceedings of the 36th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2014

Automatic Annotation of Liver CT Images: the Submission of the BMET Group to ImageCLEFmed 2014.
Proceedings of the Working Notes for CLEF 2014 Conference, 2014

Dynamic hedging of foreign exchange risk using stochastic model predictive control.
Proceedings of the IEEE Conference on Computational Intelligence for Financial Engineering & Economics, 2014

2013
Architecture and Design Flow for a Highly Efficient Structured ASIC.
IEEE Trans. Very Large Scale Integr. Syst., 2013

Feature Graph Architectures.
CoRR, 2013

A Hybrid Feature Selection and Generation Algorithm for Electricity Load Prediction Using Grammatical Evolution.
Proceedings of the 12th International Conference on Machine Learning and Applications, 2013

A low latency kernel recursive least squares processor using FPGA technology.
Proceedings of the 2013 International Conference on Field-Programmable Technology, 2013

Cluster analysis of high-dimensional high-frequency financial time series.
Proceedings of the 2013 IEEE Conference on Computational Intelligence for Financial Engineering & Economics, 2013

2012
Optimizing Floating Point Units in Hybrid FPGAs.
IEEE Trans. Very Large Scale Integr. Syst., 2012

An FPGA Chip Identification Generator Using Configurable Ring Oscillators.
IEEE Trans. Very Large Scale Integr. Syst., 2012

Hardware efficient parallel particle filter for tracking in wireless networks.
Proceedings of the 23rd IEEE International Symposium on Personal, 2012

A mixed precision Monte Carlo methodology for reconfigurable accelerator systems.
Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, 2012

A Mixed Precision Methodology for Mathematical Optimisation.
Proceedings of the 2012 IEEE 20th Annual International Symposium on Field-Programmable Custom Computing Machines, 2012

2011
An Analytical Model Relating FPGA Architecture to Logic Density and Depth.
IEEE Trans. Very Large Scale Integr. Syst., 2011

Spiking neural network-based auto-associative memory using FPGA interconnect delays.
Proceedings of the 2011 International Conference on Field-Programmable Technology, 2011

On Timing Yield Improvement for FPGA Designs Using Architectural Symmetry.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

A Model for Matrix Multiplication Performance on FPGAs.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

On timing yield improvement for FPGA designs using architectural symmetry (abstract only).
Proceedings of the ACM/SIGDA 19th International Symposium on Field Programmable Gate Arrays, 2011

A monte-carlo floating-point unit for self-validating arithmetic.
Proceedings of the ACM/SIGDA 19th International Symposium on Field Programmable Gate Arrays, 2011

A Model for Peak Matrix Performance on FPGAs.
Proceedings of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, 2011

Mixed Precision Processing in Reconfigurable Systems.
Proceedings of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, 2011

2010
Multiloop Parallelisation Using Unrolling and Fission.
Int. J. Reconfigurable Comput., 2010

Fine-grained characterization of process variation in FPGAs.
Proceedings of the International Conference on Field-Programmable Technology, 2010

An FPGA chip identification generator using configurable ring oscillator.
Proceedings of the International Conference on Field-Programmable Technology, 2010

Structured ASIC: Methodology and comparison.
Proceedings of the International Conference on Field-Programmable Technology, 2010

A Karatsuba-Based Montgomery Multiplier.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

Design of a single layer programmable Structured ASIC library.
Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010

Rapid prototyping on a structured ASIC fabric.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

2009
Floating-Point FPGA: Architecture and Modeling.
IEEE Trans. Very Large Scale Integr. Syst., 2009

Generation of Synthetic Floating-Point benchmark circuits.
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009

A detailed delay path model for FPGAs.
Proceedings of the 2009 International Conference on Field-Programmable Technology, 2009

Towards a unique FPGA-based identification circuit using process variations.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

Modeling post-techmapping and post-clustering FPGA circuit depth.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

A comparison of via-programmable gate array logic cell circuits.
Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, 2009

2008
Serial and Parallel FPGA-based Variable Block Size Motion Estimation Processors.
J. Signal Process. Syst., 2008

A Synthesizable Datapath-Oriented Embedded FPGA Fabric for Silicon Debug Applications.
ACM Trans. Reconfigurable Technol. Syst., 2008

The Coarse-Grained/Fine-Grained Logic Interface in FPGAs with Embedded Floating-Point Arithmetic Units.
Int. J. Reconfigurable Comput., 2008

Current Trends on Reconfigurable Computing.
Int. J. Reconfigurable Comput., 2008

Optimizing coarse-grained units in floating point hybrid FPGA.
Proceedings of the 2008 International Conference on Field-Programmable Technology, 2008

Unrolling-based loop mapping and scheduling.
Proceedings of the 2008 International Conference on Field-Programmable Technology, 2008

An analytical model describing the relationships between logic architecture and FPGA density.
Proceedings of the FPL 2008, 2008

Mapping and scheduling with task clustering for heterogeneous computing systems.
Proceedings of the FPL 2008, 2008

Rapid estimation of power consumption for hybrid FPGAs.
Proceedings of the FPL 2008, 2008

FPGA interconnect design using logical effort.
Proceedings of the ACM/SIGDA 16th International Symposium on Field Programmable Gate Arrays, 2008

Map-reduce as a Programming Model for Custom Computing Machines.
Proceedings of the 16th IEEE International Symposium on Field-Programmable Custom Computing Machines, 2008

Recent Trends in FPGA Architectures and Applications.
Proceedings of the 4th IEEE International Symposium on Electronic Design, 2008

2007
An AA-Sized Vibration-Based Microgenerator for Wireless Sensors.
IEEE Pervasive Comput., 2007

High performance physical random number generator.
IET Comput. Digit. Tech., 2007

Editorial - Field-programmable logic and applications.
IET Comput. Digit. Tech., 2007

Gaussian random number generators.
ACM Comput. Surv., 2007

Handwriting tracking based on coupled μIMU/electromagnetic resonance motion detection.
Proceedings of the IEEE International Conference on Robotics and Biomimetics, 2007

Towards a mobile airbag system using MEMS sensors and embedded intelligence.
Proceedings of the IEEE International Conference on Robotics and Biomimetics, 2007

μIMU-based handwriting recognition calibration by optical tracking.
Proceedings of the IEEE International Conference on Robotics and Biomimetics, 2007

Domain-Specific Hybrid FPGA: Architecture and Floating Point Applications.
Proceedings of the FPL 2007, 2007

A synthesizable datapath-oriented embedded FPGA fabric.
Proceedings of the ACM/SIGDA 15th International Symposium on Field Programmable Gate Arrays, 2007

2006
A Hardware Gaussian Noise Generator Using the Box-Muller Method and Its Error Analysis.
IEEE Trans. Computers, 2006

A Novel Real-Time Error Compensation Methodology for ?IMU-based Digital Writing Instrument.
Proceedings of the IEEE International Conference on Robotics and Biomimetics, 2006

Development of a Human Airbag System for Fall Protection Using MEMS Motion Sensing Technology.
Proceedings of the 2006 IEEE/RSJ International Conference on Intelligent Robots and Systems, 2006

A Scalable FPGA Implementation of Cellular Neural Networks for Gabor-type Filtering.
Proceedings of the International Joint Conference on Neural Networks, 2006

FPGA-based MSB-first bit-serial variable block size motion estimation processor.
Proceedings of the 2006 IEEE International Conference on Field Programmable Technology, 2006

An FPGA-Based Electronic Cochlea with Dual Fixed-Point Arithmetic.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

FPGA Based Acceleration of the Linpack Benchmark: A High Level Code Transformation Approach.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

Virtual Embedded Blocks: A Methodology for Evaluating Embedded Elements in FPGAs.
Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006

Hardware efficient architectures for Eigenvalue computation.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2005
A hardware Gaussian noise generator using the Wallace method.
IEEE Trans. Very Large Scale Integr. Syst., 2005

CPE: A Parallel Library for Financial Engineering Applications.
Computer, 2005

Towards a human airbag system using µIMU with SVM training for falling-motion recognition.
Proceedings of the IEEE International Conference on Robotics and Biomimetics, 2005

Field programmable gate array technology for robotics applications.
Proceedings of the IEEE International Conference on Robotics and Biomimetics, 2005

Mobile Computing Architectures, Design and Implementation.
Proceedings of the 38th Hawaii International Conference on System Sciences (HICSS-38 2005), 2005

Reconfigurable Acceleration for Monte Carlo Based Financial Simulation.
Proceedings of the 2005 IEEE International Conference on Field-Programmable Technology, 2005

Dynamic Voltage Scaling for Commercial FPGAs.
Proceedings of the 2005 IEEE International Conference on Field-Programmable Technology, 2005

Implementation of Gabor-Type Filters on Field Programmable Gate Arrays.
Proceedings of the 2005 IEEE International Conference on Field-Programmable Technology, 2005

Ziggurat-based Hardware Gaussian Random Number Generator.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

Mullet - A Parallel Multiplier Generator.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

2004
Self-Powered Wireless temperature Sensing Using MEMS-Based AA-Size Energy Transducer.
Int. J. Inf. Acquis., 2004

An FPGA-based Othello endgame solver.
Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology, 2004

IP Generation for an FPGA-Based Audio DAC Sigma-Delta Converter.
Proceedings of the Field Programmable Logic and Application, 2004

An Arithmetic Library and Its Application to the N-body Problem.
Proceedings of the 12th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), 2004

2003
A variable-radix digit-serial design methodology and its application to the discrete cosine transform.
IEEE Trans. Very Large Scale Integr. Syst., 2003

An FPGA-Based Electronic Cochlea.
EURASIP J. Adv. Signal Process., 2003

Development of an AA size energy transducer with micro resonators.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Modular exponentiation using parallel multipliers.
Proceedings of the 2003 IEEE International Conference on Field-Programmable Technology, 2003

Arbitrary function approximation in HDLs with application to the N-body problem.
Proceedings of the 2003 IEEE International Conference on Field-Programmable Technology, 2003

An FPGA-based re-configurable 24-bit 96kHz sigma-delta audio DAC.
Proceedings of the 2003 IEEE International Conference on Field-Programmable Technology, 2003

A Smith-Waterman Systolic Cell.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

Compact FPGA-based True and Pseudo Random Number Generators.
Proceedings of the 11th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2003), 2003

FPGA-based SIMD Processor.
Proceedings of the 11th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2003), 2003

2002
A microcoded elliptic curve processor using FPGA technology.
IEEE Trans. Very Large Scale Integr. Syst., 2002

Rapid Prototyping of FPGA Based Floating Point DSP Systems.
Proceedings of the 13th IEEE International Workshop on Rapid System Prototyping (RSP 2002), 2002

A system level implementation of Rijndael on a memory-slot based FPGA card.
Proceedings of the 2002 IEEE International Conference on Field-Programmable Technology, 2002

Implementation of an FPGA based accelerator for virtual private networks.
Proceedings of the 2002 IEEE International Conference on Field-Programmable Technology, 2002

An FPGA Based SHA-256 Processor.
Proceedings of the Field-Programmable Logic and Applications, 2002

Fly - A Modifiable Hardware Compiler.
Proceedings of the Field-Programmable Logic and Applications, 2002

A Massively Parallel RC4 Key Search Engine.
Proceedings of the 10th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2002), 2002

2001
A bitstream reconfigurable FPGA implementation of the WSAT algorithm.
IEEE Trans. Very Large Scale Integr. Syst., 2001

Pilchard - A Reconfigurable Computing Platform with Memory Slot Interface.
Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2001

Parameterized Module Generator for an FPGA-Based Electronic Cochlea.
Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2001

Tradeoffs in Parallel and Serial Implementations of the International Data Encryption Algorithm IDEA.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2001

2000
FPGA Implementation of a Microcoded Elliptic Curve Cryptographic Processor.
Proceedings of the 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), 2000

A Bit-Serial Implementation of the International Data Encryption Algorithm IDEA.
Proceedings of the 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), 2000

1999
An Architecture for Solving Boolean Satisfiability Using Runtime Configurable Hardware.
Proceedings of the 1999 International Conference on Parallel Processing Workshops, 1999

A Runtime Reconfigurable Implementation of the GSAT Algorithm.
Proceedings of the Field-Programmable Logic and Applications, 9th International Workshop, 1999

Automatic Floating to Fixed Point Translation and its Application to Post-Rendering 3D Warping.
Proceedings of the 7th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99), 1999

1998
A FPGA Based Forth Microprocessor.
Proceedings of the 6th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '98), 1998

An FPGA Implementation of GENET for Solving Graph Coloring Problems .
Proceedings of the 6th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '98), 1998

1995
A low-power VLSI arrhythmia classifier.
IEEE Trans. Neural Networks, 1995

An area efficient implementation of a cellular neural network.
Proceedings of the 2nd New Zealand Two-Stream International Conference on Artificial Neural Networks and Expert Systems (ANNES '95), 1995

1993
Algorithmic and implementation issues in analog low power learning neural network chips.
J. VLSI Signal Process., 1993

Kakadu - A Low Power Analogue Neural Network Classifier.
Int. J. Neural Syst., 1993

An analogue neural network using MCM technology.
Proceedings of the First New Zealand International Two-Stream Conference on Artificial Neural Networks and Expert Systems, 1993

1991
UNIX Password Encryption Considered Insecure.
Proceedings of the Usenix Winter 1991 Conference, Dallas, TX, USA, January 1991, 1991

ANN Board Classification for Heart Defibrillators.
Proceedings of the Advances in Neural Information Processing Systems 4, 1991


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