Phil Moorby

According to our database1, Phil Moorby authored at least 7 papers between 1983 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

Online presence:

On csauthors.net:

Bibliography

2020
Verilog HDL and its ancestors and descendants.
Proc. ACM Program. Lang., 2020

2005
Are we ready for system-level synthesis?
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004
Design for Verification with SystemVerilog.
Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004

1996
The Verilog hardware description language (3. ed.).
Kluwer, ISBN: 978-0-7923-9723-6, 1996

1995
The Verilog hardware description language (2. ed.).
Kluwer, ISBN: 978-0-7923-9523-2, 1995

1992
Three Decades of HDLs: Part II, Conlan Through Verilog.
IEEE Des. Test Comput., 1992

1983
An algebra for logic strength simulation.
Proceedings of the 20th Design Automation Conference, 1983


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