A Feature Extraction Application on a Reconfigurable Image Processor. - Philip P. Dang; Paul M. Chau (IVCNZ, 1998)

Reconfigurable Hardware for Encryption. - Jeremy Risher; Philip P. Dang; Paul M. Chau (Applied Informatics, 1999)

FPGA architecture for noise filters on a reconfigurable processor. - Philip P. Dang; Paul M. Chau (CATA, 1999)

Image encryption for multimedia applications. - Philip P. Dang; Paul M. Chau (CATA, 2000)

Hardware/software implementation 3-way algorithm for image encryption. - Philip P. Dang; Paul M. Chau (Security and Watermarking of Multimedia Contents, 2000)

Image encryption for secure Internet multimedia applications. - Philip P. Dang; Paul M. Chau (IEEE Trans. Consumer Electron., 2000)

Robust image transmission over CDMA channels. - Philip P. Dang; Paul M. Chau (IEEE Trans. Consumer Electron., 2000)

Reduce complexity hardware implementation of discrete wavelet transform for JPEG 2000 standard. - Philip P. Dang; Paul M. Chau (ICME (1), 2002)

Design of high-performance coprocessor for color error diffusion. - Philip P. Dang (Color Imaging: Processing, Hardcopy, and Applications, 2004)

High-performance VLSI architecture for adaptive scaling. - Philip P. Dang (Real-Time Image Processing, 2006)

VLSI architecture for real-time image and video processing systems. - Philip P. Dang (J. Real Time Image Process., 2006)

A high performance parallel architecture of H.264 intra prediction for motion estimation. - Philip P. Dang (Real-Time Image Processing, 2008)

Architecture of an application-specific processor for real-time implementation of H.264/AVC sub-pixel interpolation. - Philip P. Dang (J. Real Time Image Process., 2009)