A system of array families and synthesized soft arrays for the POWER9™ processor in 14nm SOI FinFET technology. - Philipp Salz; A. Frisch; Wolfgang Penth; J. Noack; T. Kalla; Rolf Sautter; Michael Kugel; Otto A. Torreiter; G. Sapp; Mike Lee; Eric Fluhr; A. Rozenfeld; et al. (ESSCIRC, 2017)

POWER10™: A 16-Core SMT8 Server Processor With 2TB/s Off-Chip Bandwidth in 7nm Technology. - Rahul M. Rao; Christopher J. Gonzalez; Eric Fluhr; Abraham Mathews; Andrew Bianchi; Daniel Dreps; David Wolpert 001; Eric Lai; Gerald Strevig; Glen A. Wiedemeier; Philipp Salz; Ryan Kruse (ISSCC, 2022)

37.1 IBM Telum II Processor Design-Technology Co-Optimizations for Power, Performance, Area, and Reliability. - David Wolpert 001; Gerry Strevig; Christopher J. Berry; Leon J. Sigal; Bill Huott; Mark Cichanowski; Matthias Pflanz; Tobias Werner 001; Philipp Salz; Nick Jinq; Michael Romain; Iris Leefken; et al. (ISSCC, 2025)