Low-Cost TMR for Fault-Tolerance on Coarse-Grained Reconfigurable Architectures. - Thomas Schweizer; Philipp Schlicker; Sven Eisenhardt; Tommy Kuhn; Wolfgang Rosenstiel (ReConFig, 2011)

Gate-Level Models for Fast Cross-Level Power Density Estimation. - Philipp Schlicker; Oliver Bringmann 001 (ACM Great Lakes Symposium on VLSI, 2020)